From f767e97fa54f65be27ad37cf9d094caaa3f072dd Mon Sep 17 00:00:00 2001 From: Sebastien Boeuf Date: Thu, 21 Apr 2022 10:19:11 +0200 Subject: [PATCH] pci: vfio: Split PCI capability parsing functions We need to split the parsing functions into one function dedicated to the actual parsing and a second function for initializing the interrupt type. This will be useful on the restore path as the parsing won't be needed. Signed-off-by: Sebastien Boeuf --- pci/src/vfio.rs | 51 +++++++++++++++++++++++++------------------------ 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/pci/src/vfio.rs b/pci/src/vfio.rs index 002310f3d..d520ab499 100644 --- a/pci/src/vfio.rs +++ b/pci/src/vfio.rs @@ -581,25 +581,27 @@ impl VfioCommon { Ok(()) } - pub(crate) fn parse_msix_capabilities( - &mut self, - cap: u8, - interrupt_manager: &Arc>, - vfio_wrapper: &dyn Vfio, - bdf: PciBdf, - ) { + pub(crate) fn parse_msix_capabilities(&mut self, cap: u8, vfio_wrapper: &dyn Vfio) -> MsixCap { let msg_ctl = vfio_wrapper.read_config_word((cap + 2).into()); let table = vfio_wrapper.read_config_dword((cap + 4).into()); let pba = vfio_wrapper.read_config_dword((cap + 8).into()); - let msix_cap = MsixCap { + MsixCap { msg_ctl, table, pba, - }; + } + } + pub(crate) fn initialize_msix( + &mut self, + msix_cap: MsixCap, + cap_offset: u32, + interrupt_manager: &Arc>, + bdf: PciBdf, + ) { let interrupt_source_group = interrupt_manager .create_group(MsiIrqGroupConfig { base: 0, @@ -616,19 +618,21 @@ impl VfioCommon { self.interrupt.msix = Some(VfioMsix { bar: msix_config, cap: msix_cap, - cap_offset: cap.into(), + cap_offset, interrupt_source_group, }); } - pub(crate) fn parse_msi_capabilities( - &mut self, - cap: u8, - interrupt_manager: &Arc>, - vfio_wrapper: &dyn Vfio, - ) { - let msg_ctl = vfio_wrapper.read_config_word((cap + 2).into()); + pub(crate) fn parse_msi_capabilities(&mut self, cap: u8, vfio_wrapper: &dyn Vfio) -> u16 { + vfio_wrapper.read_config_word((cap + 2).into()) + } + pub(crate) fn initialize_msi( + &mut self, + msg_ctl: u16, + cap_offset: u32, + interrupt_manager: &Arc>, + ) { let interrupt_source_group = interrupt_manager .create_group(MsiIrqGroupConfig { base: 0, @@ -640,7 +644,7 @@ impl VfioCommon { self.interrupt.msi = Some(VfioMsi { cfg: msi_config, - cap_offset: cap.into(), + cap_offset, interrupt_source_group, }); } @@ -662,7 +666,8 @@ impl VfioCommon { if irq_info.count > 0 { // Parse capability only if the VFIO device // supports MSI. - self.parse_msi_capabilities(cap_next, interrupt_manager, vfio_wrapper); + let msg_ctl = self.parse_msi_capabilities(cap_next, vfio_wrapper); + self.initialize_msi(msg_ctl, cap_next as u32, interrupt_manager); } } } @@ -671,12 +676,8 @@ impl VfioCommon { if irq_info.count > 0 { // Parse capability only if the VFIO device // supports MSI-X. - self.parse_msix_capabilities( - cap_next, - interrupt_manager, - vfio_wrapper, - bdf, - ); + let msix_cap = self.parse_msix_capabilities(cap_next, vfio_wrapper); + self.initialize_msix(msix_cap, cap_next as u32, interrupt_manager, bdf); } } }