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devices: Add PCI configuration registers method to the BusDevice Trait

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This is the only clean, or not so dirty way for us to pass a BusDevice
instance to the PciRoot add_device() method.
This is very similar to what crosvm does and we now understand why...

Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
Samuel Ortiz 2019-04-18 11:57:01 +02:00
parent db7937d47c
commit fa3951df22
1 changed files with 10 additions and 0 deletions
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10
devices/src/bus.rs
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@ -24,6 +24,16 @@ pub trait BusDevice: Send {
fn write(&mut self, offset: u64, data: &[u8]) {} fn write(&mut self, offset: u64, data: &[u8]) {}
/// Triggers the `irq_mask` interrupt on this device /// Triggers the `irq_mask` interrupt on this device
fn interrupt(&self, irq_mask: u32) {} fn interrupt(&self, irq_mask: u32) {}
/// Sets a register in the configuration space. Only used by PCI.
/// * `reg_idx` - The index of the config register to modify.
/// * `offset` - Offset in to the register.
fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8]) {}
/// Gets a register from the configuration space. Only used by PCI.
/// * `reg_idx` - The index of the config register to read.
fn read_config_register(&self, reg_idx: usize) -> u32 {
0
}
} }
#[derive(Debug)] #[derive(Debug)]