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50bac1694f
While non-Intel CPU architectures don't have a special concept of IO address space, support for PCI I/O regions is still needed to be able to handle PCI devices that use them. With this change, I'm able to pass through an e1000e device from QEMU to a cloud-hypervisor VM on aarch64 and use it in the cloud-hypervisor guest. Previously, it would hit the unimplemented!(). Signed-off-by: Alyssa Ross <hi@alyssa.is> |
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| .. | ||
| bus.rs | ||
| configuration.rs | ||
| device.rs | ||
| lib.rs | ||
| msi.rs | ||
| msix.rs | ||
| vfio_user.rs | ||
| vfio.rs | ||