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Misspellings were identified by https://github.com/marketplace/actions/check-spelling * Initial corrections suggested by Google Sheets * Additional corrections by Google Chrome auto-suggest * Some manual corrections Signed-off-by: Josh Soref <jsoref@users.noreply.github.com>
54 lines
1.1 KiB
Rust
54 lines
1.1 KiB
Rust
// Copyright © 2020 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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#[macro_use]
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extern crate serde_derive;
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extern crate vm_memory;
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use std::io;
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mod bus;
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pub mod interrupt;
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pub use self::bus::{Bus, BusDevice, Error as BusError};
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#[derive(Debug)]
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pub enum Error {
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IoError(io::Error),
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}
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/// Type of Message Signalled Interrupt
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#[derive(Copy, Clone, Debug, PartialEq, Serialize, Deserialize)]
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pub enum MsiIrqType {
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/// PCI MSI IRQ numbers.
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PciMsi,
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/// PCI MSIx IRQ numbers.
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PciMsix,
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/// Generic MSI IRQ numbers.
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GenericMsi,
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}
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/// Enumeration for device resources.
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#[allow(missing_docs)]
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#[derive(Clone, Debug, Serialize, Deserialize)]
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pub enum Resource {
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/// IO Port address range.
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PioAddressRange { base: u16, size: u16 },
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/// Memory Mapped IO address range.
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MmioAddressRange { base: u64, size: u64 },
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/// Legacy IRQ number.
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LegacyIrq(u32),
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/// Message Signaled Interrupt
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MsiIrq {
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ty: MsiIrqType,
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base: u32,
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size: u32,
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},
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/// Network Interface Card MAC address.
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MacAddress(String),
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/// KVM memslot index.
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KvmMemSlot(u32),
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}
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