mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-11-05 03:21:13 +00:00
f282cc001a
Add API to the hypervisor interface and implement for KVM to allow the special TDX KVM ioctls on the VM and vCPU FDs. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
425 lines
13 KiB
Rust
425 lines
13 KiB
Rust
// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
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//
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// Copyright © 2020, Microsoft Corporation
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//
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// Copyright 2018-2019 CrowdStrike, Inc.
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//
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//
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#[cfg(target_arch = "aarch64")]
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use crate::aarch64::VcpuInit;
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#[cfg(target_arch = "aarch64")]
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use crate::aarch64::{RegList, Register, StandardRegisters};
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#[cfg(target_arch = "x86_64")]
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use crate::x86_64::{CpuId, LapicState};
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#[cfg(target_arch = "x86_64")]
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use crate::x86_64::{
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ExtendedControlRegisters, FpuState, MsrEntries, SpecialRegisters, StandardRegisters, VcpuEvents,
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};
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use crate::CpuState;
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#[cfg(feature = "kvm")]
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use crate::MpState;
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#[cfg(target_arch = "x86_64")]
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use crate::Xsave;
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#[cfg(feature = "mshv")]
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use mshv_bindings::*;
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use thiserror::Error;
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#[derive(Error, Debug)]
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///
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/// Enum for CPU error
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pub enum HypervisorCpuError {
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///
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/// Setting standard registers error
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///
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#[error("Failed to set standard register: {0}")]
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SetStandardRegs(#[source] anyhow::Error),
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///
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/// Setting standard registers error
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///
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#[error("Failed to get standard registers: {0}")]
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GetStandardRegs(#[source] anyhow::Error),
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///
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/// Setting special register error
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///
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#[error("Failed to set special registers: {0}")]
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SetSpecialRegs(#[source] anyhow::Error),
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///
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/// Getting standard register error
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///
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#[error("Failed to get special registers: {0}")]
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GetSpecialRegs(#[source] anyhow::Error),
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///
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/// Setting floating point registers error
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///
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#[error("Failed to set special register: {0}")]
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SetFloatingPointRegs(#[source] anyhow::Error),
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///
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/// Getting floating point register error
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///
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#[error("Failed to get special register: {0}")]
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GetFloatingPointRegs(#[source] anyhow::Error),
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///
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/// Setting Cpuid error
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///
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#[error("Failed to set Cpuid: {0}")]
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SetCpuid(#[source] anyhow::Error),
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///
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/// Getting Cpuid error
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///
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#[error("Failed to get Cpuid: {0}")]
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GetCpuid(#[source] anyhow::Error),
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///
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/// Setting lapic state error
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///
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#[error("Failed to set Lapic state: {0}")]
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SetLapicState(#[source] anyhow::Error),
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///
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/// Getting Lapic state error
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///
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#[error("Failed to get Lapic state: {0}")]
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GetlapicState(#[source] anyhow::Error),
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///
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/// Setting MSR entries error
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///
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#[error("Failed to set Msr entries: {0}")]
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SetMsrEntries(#[source] anyhow::Error),
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///
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/// Getting Msr entries error
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///
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#[error("Failed to get Msr entries: {0}")]
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GetMsrEntries(#[source] anyhow::Error),
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///
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/// Setting MSR entries error
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///
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#[error("Failed to set MP state: {0}")]
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SetMpState(#[source] anyhow::Error),
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///
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/// Getting Msr entries error
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///
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#[error("Failed to get MP state: {0}")]
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GetMpState(#[source] anyhow::Error),
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///
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/// Setting Saved Processor Extended States error
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///
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#[error("Failed to set Saved Processor Extended States: {0}")]
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SetXsaveState(#[source] anyhow::Error),
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///
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/// Getting Saved Processor Extended States error
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///
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#[error("Failed to get Saved Processor Extended States: {0}")]
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GetXsaveState(#[source] anyhow::Error),
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///
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/// Setting Extended Control Registers error
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///
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#[error("Failed to set Extended Control Registers: {0}")]
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SetXcsr(#[source] anyhow::Error),
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///
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/// Getting Extended Control Registers error
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///
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#[error("Failed to get Extended Control Registers: {0}")]
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GetXcsr(#[source] anyhow::Error),
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///
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/// Running Vcpu error
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///
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#[error("Failed to run vcpu: {0}")]
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RunVcpu(#[source] anyhow::Error),
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///
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/// Getting Vcpu events error
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///
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#[error("Failed to get Vcpu events: {0}")]
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GetVcpuEvents(#[source] anyhow::Error),
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///
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/// Setting Vcpu events error
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///
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#[error("Failed to set Vcpu events: {0}")]
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SetVcpuEvents(#[source] anyhow::Error),
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///
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/// Vcpu Init error
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///
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#[error("Failed to init vcpu: {0}")]
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VcpuInit(#[source] anyhow::Error),
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///
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/// Setting one reg error
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///
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#[error("Failed to init vcpu: {0}")]
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SetRegister(#[source] anyhow::Error),
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///
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/// Getting one reg error
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///
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#[error("Failed to init vcpu: {0}")]
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GetRegister(#[source] anyhow::Error),
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///
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/// Getting guest clock paused error
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///
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#[error("Failed to notify guest its clock was paused: {0}")]
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NotifyGuestClockPaused(#[source] anyhow::Error),
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///
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/// Setting debug register error
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///
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#[error("Failed to set debug registers: {0}")]
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SetDebugRegs(#[source] anyhow::Error),
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///
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/// Getting debug register error
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///
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#[error("Failed to get debug registers: {0}")]
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GetDebugRegs(#[source] anyhow::Error),
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///
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/// Write to Guest Mem
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///
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#[error("Failed to write to Guest Mem at: {0}")]
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GuestMemWrite(#[source] anyhow::Error),
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/// Enabling HyperV SynIC error
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///
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#[error("Failed to enable HyperV SynIC")]
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EnableHyperVSynIC(#[source] anyhow::Error),
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///
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/// Getting AArch64 core register error
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///
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#[error("Failed to get core register: {0}")]
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GetCoreRegister(#[source] anyhow::Error),
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///
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/// Setting AArch64 core register error
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///
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#[error("Failed to set core register: {0}")]
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SetCoreRegister(#[source] anyhow::Error),
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///
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/// Getting AArch64 registers list error
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///
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#[error("Failed to retrieve list of registers: {0}")]
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GetRegList(#[source] anyhow::Error),
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///
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/// Getting AArch64 system register error
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///
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#[error("Failed to get system register: {0}")]
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GetSysRegister(#[source] anyhow::Error),
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///
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/// Setting AArch64 system register error
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///
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#[error("Failed to set system register: {0}")]
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SetSysRegister(#[source] anyhow::Error),
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///
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/// GVA translation error
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///
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#[error("Failed to translate GVA: {0}")]
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TranslateGVA(#[source] anyhow::Error),
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///
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/// Failed to initialize TDX on CPU
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///
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#[cfg(feature = "tdx")]
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#[error("Failed to initialize TDX: {0}")]
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InitializeTdx(#[source] std::io::Error),
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}
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#[derive(Debug)]
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pub enum VmExit<'a> {
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#[cfg(target_arch = "x86_64")]
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IoOut(u16 /* port */, &'a [u8] /* data */),
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#[cfg(target_arch = "x86_64")]
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IoIn(u16 /* port */, &'a mut [u8] /* data */),
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#[cfg(target_arch = "x86_64")]
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IoapicEoi(u8 /* vector */),
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MmioRead(u64 /* address */, &'a mut [u8]),
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MmioWrite(u64 /* address */, &'a [u8]),
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Ignore,
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Reset,
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Shutdown,
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Hyperv,
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}
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///
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/// Result type for returning from a function
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///
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pub type Result<T> = anyhow::Result<T, HypervisorCpuError>;
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///
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/// Trait to represent a generic Vcpu
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///
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pub trait Vcpu: Send + Sync {
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the vCPU general purpose registers.
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///
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fn get_regs(&self) -> Result<StandardRegisters>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets the vCPU general purpose registers.
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///
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fn set_regs(&self, regs: &StandardRegisters) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the vCPU special registers.
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///
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fn get_sregs(&self) -> Result<SpecialRegisters>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets the vCPU special registers
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///
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fn set_sregs(&self, sregs: &SpecialRegisters) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the floating point state (FPU) from the vCPU.
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///
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fn get_fpu(&self) -> Result<FpuState>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Set the floating point state (FPU) of a vCPU
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///
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fn set_fpu(&self, fpu: &FpuState) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to setup the CPUID registers.
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///
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fn set_cpuid2(&self, cpuid: &CpuId) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to enable HyperV SynIC
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///
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fn enable_hyperv_synic(&self) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call to retrieve the CPUID registers.
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///
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fn get_cpuid2(&self, num_entries: usize) -> Result<CpuId>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the state of the LAPIC (Local Advanced Programmable Interrupt Controller).
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///
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fn get_lapic(&self) -> Result<LapicState>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets the state of the LAPIC (Local Advanced Programmable Interrupt Controller).
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///
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fn set_lapic(&self, lapic: &LapicState) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns the model-specific registers (MSR) for this vCPU.
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///
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fn get_msrs(&self, msrs: &mut MsrEntries) -> Result<usize>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Setup the model-specific registers (MSR) for this vCPU.
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///
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fn set_msrs(&self, msrs: &MsrEntries) -> Result<usize>;
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#[cfg(feature = "kvm")]
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///
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/// Returns the vcpu's current "multiprocessing state".
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///
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fn get_mp_state(&self) -> Result<MpState>;
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#[cfg(feature = "kvm")]
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///
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/// Sets the vcpu's current "multiprocessing state".
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///
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fn set_mp_state(&self, mp_state: MpState) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call that returns the vcpu's current "xsave struct".
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///
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fn get_xsave(&self) -> Result<Xsave>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call that sets the vcpu's current "xsave struct".
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///
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fn set_xsave(&self, xsave: &Xsave) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call that returns the vcpu's current "xcrs".
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///
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fn get_xcrs(&self) -> Result<ExtendedControlRegisters>;
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#[cfg(target_arch = "x86_64")]
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///
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/// X86 specific call that sets the vcpu's current "xcrs".
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///
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fn set_xcrs(&self, xcrs: &ExtendedControlRegisters) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Returns currently pending exceptions, interrupts, and NMIs as well as related
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/// states of the vcpu.
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///
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fn get_vcpu_events(&self) -> Result<VcpuEvents>;
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#[cfg(target_arch = "x86_64")]
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///
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/// Sets pending exceptions, interrupts, and NMIs as well as related states
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/// of the vcpu.
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///
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fn set_vcpu_events(&self, events: &VcpuEvents) -> Result<()>;
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#[cfg(all(feature = "kvm", target_arch = "x86_64"))]
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///
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/// Let the guest know that it has been paused, which prevents from
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/// potential soft lockups when being resumed.
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///
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fn notify_guest_clock_paused(&self) -> Result<()>;
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///
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/// Sets the type of CPU to be exposed to the guest and optional features.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn vcpu_init(&self, kvi: &VcpuInit) -> Result<()>;
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///
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/// Sets the value of one register for this vCPU.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn set_reg(&self, reg_id: u64, data: u64) -> Result<()>;
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///
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/// Sets the value of one register for this vCPU.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn get_reg(&self, reg_id: u64) -> Result<u64>;
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///
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/// Gets a list of the guest registers that are supported for the
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/// KVM_GET_ONE_REG/KVM_SET_ONE_REG calls.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn get_reg_list(&self, reg_list: &mut RegList) -> Result<()>;
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///
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/// Save the state of the core registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn core_registers(&self, state: &mut StandardRegisters) -> Result<()>;
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///
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/// Restore the state of the core registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn set_core_registers(&self, state: &StandardRegisters) -> Result<()>;
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///
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/// Save the state of the system registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn system_registers(&self, state: &mut Vec<Register>) -> Result<()>;
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///
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/// Restore the state of the system registers.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn set_system_registers(&self, state: &[Register]) -> Result<()>;
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///
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/// Read the MPIDR - Multiprocessor Affinity Register.
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///
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn read_mpidr(&self) -> Result<u64>;
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///
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/// Retrieve the vCPU state.
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/// This function is necessary to snapshot the VM
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///
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fn state(&self) -> Result<CpuState>;
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///
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/// Set the vCPU state.
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/// This function is required when restoring the VM
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///
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fn set_state(&self, state: &CpuState) -> Result<()>;
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///
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/// Triggers the running of the current virtual CPU returning an exit reason.
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///
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fn run(&self) -> std::result::Result<VmExit, HypervisorCpuError>;
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#[cfg(all(feature = "mshv", target_arch = "x86_64"))]
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///
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/// Translate guest virtual address to guest physical address
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///
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fn translate_gva(&self, gva: u64, flags: u64) -> Result<(u64, hv_translate_gva_result)>;
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///
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/// Initialize TDX support on the vCPU
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///
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#[cfg(feature = "tdx")]
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fn tdx_init(&self, hob_address: u64) -> Result<()>;
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}
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