mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-11-05 19:41:27 +00:00
0fec326582
This interface is used by the vCPU thread to delegate responsibility for handling MMIO/PIO operations and to support different approaches than a VM exit. During profiling I found that we were spending 13.75% of the boot CPU uage acquiring access to the object holding the VmmOps via ArcSwap::load_full() 13.75% 6.02% vcpu0 cloud-hypervisor [.] arc_swap::ArcSwapAny<T,S>::load_full | ---arc_swap::ArcSwapAny<T,S>::load_full | --13.43%--<hypervisor::kvm::KvmVcpu as hypervisor::cpu::Vcpu>::run std::sys_common::backtrace::__rust_begin_short_backtrace core::ops::function::FnOnce::call_once{{vtable-shim}} std::sys::unix:🧵:Thread:🆕:thread_start However since the object implementing VmmOps does not need to be mutable and it is only used from the vCPU side we can change the ownership to being a simple Arc<> that is passed in when calling create_vcpu(). This completely removes the above CPU usage from subsequent profiles. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
476 lines
14 KiB
Rust
476 lines
14 KiB
Rust
// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0 AND BSD-3-Clause
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//
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use devices::interrupt_controller::InterruptController;
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use std::collections::HashMap;
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use std::io;
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use std::sync::atomic::{AtomicBool, Ordering};
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use std::sync::{Arc, Mutex};
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use vm_allocator::SystemAllocator;
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use vm_device::interrupt::{
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InterruptIndex, InterruptManager, InterruptSourceConfig, InterruptSourceGroup,
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LegacyIrqGroupConfig, MsiIrqGroupConfig,
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};
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use vmm_sys_util::eventfd::EventFd;
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/// Reuse std::io::Result to simplify interoperability among crates.
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pub type Result<T> = std::io::Result<T>;
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struct InterruptRoute {
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gsi: u32,
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irq_fd: EventFd,
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registered: AtomicBool,
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}
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impl InterruptRoute {
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pub fn new(allocator: &mut SystemAllocator) -> Result<Self> {
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let irq_fd = EventFd::new(libc::EFD_NONBLOCK)?;
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let gsi = allocator
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.allocate_gsi()
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.ok_or_else(|| io::Error::new(io::ErrorKind::Other, "Failed allocating new GSI"))?;
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Ok(InterruptRoute {
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gsi,
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irq_fd,
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registered: AtomicBool::new(false),
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})
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}
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pub fn enable(&self, vm: &Arc<dyn hypervisor::Vm>) -> Result<()> {
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if !self.registered.load(Ordering::SeqCst) {
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vm.register_irqfd(&self.irq_fd, self.gsi).map_err(|e| {
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io::Error::new(
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io::ErrorKind::Other,
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format!("Failed registering irq_fd: {}", e),
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)
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})?;
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// Update internals to track the irq_fd as "registered".
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self.registered.store(true, Ordering::SeqCst);
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}
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Ok(())
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}
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pub fn disable(&self, vm: &Arc<dyn hypervisor::Vm>) -> Result<()> {
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if self.registered.load(Ordering::SeqCst) {
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vm.unregister_irqfd(&self.irq_fd, self.gsi).map_err(|e| {
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io::Error::new(
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io::ErrorKind::Other,
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format!("Failed unregistering irq_fd: {}", e),
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)
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})?;
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// Update internals to track the irq_fd as "unregistered".
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self.registered.store(false, Ordering::SeqCst);
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}
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Ok(())
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}
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pub fn trigger(&self) -> Result<()> {
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self.irq_fd.write(1)
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}
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pub fn notifier(&self) -> Option<&EventFd> {
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Some(&self.irq_fd)
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}
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}
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pub struct RoutingEntry<E> {
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route: E,
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masked: bool,
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}
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pub struct MsiInterruptGroup<E> {
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vm: Arc<dyn hypervisor::Vm>,
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gsi_msi_routes: Arc<Mutex<HashMap<u32, RoutingEntry<E>>>>,
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irq_routes: HashMap<InterruptIndex, InterruptRoute>,
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}
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pub trait MsiInterruptGroupOps<E> {
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fn set_gsi_routes(&self, routes: &HashMap<u32, RoutingEntry<E>>) -> Result<()>;
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}
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pub trait RoutingEntryExt {
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fn make_entry(
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vm: &Arc<dyn hypervisor::Vm>,
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gsi: u32,
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config: &InterruptSourceConfig,
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) -> Result<Box<Self>>;
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}
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impl<E> MsiInterruptGroup<E> {
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fn new(
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vm: Arc<dyn hypervisor::Vm>,
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gsi_msi_routes: Arc<Mutex<HashMap<u32, RoutingEntry<E>>>>,
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irq_routes: HashMap<InterruptIndex, InterruptRoute>,
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) -> Self {
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MsiInterruptGroup {
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vm,
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gsi_msi_routes,
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irq_routes,
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}
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}
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}
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impl<E> InterruptSourceGroup for MsiInterruptGroup<E>
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where
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E: Send + Sync,
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RoutingEntry<E>: RoutingEntryExt,
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MsiInterruptGroup<E>: MsiInterruptGroupOps<E>,
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{
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fn enable(&self) -> Result<()> {
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for (_, route) in self.irq_routes.iter() {
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route.enable(&self.vm)?;
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}
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Ok(())
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}
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fn disable(&self) -> Result<()> {
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for (_, route) in self.irq_routes.iter() {
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route.disable(&self.vm)?;
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}
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Ok(())
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}
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fn trigger(&self, index: InterruptIndex) -> Result<()> {
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if let Some(route) = self.irq_routes.get(&index) {
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return route.trigger();
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}
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Err(io::Error::new(
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io::ErrorKind::Other,
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format!("trigger: Invalid interrupt index {}", index),
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))
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}
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fn notifier(&self, index: InterruptIndex) -> Option<&EventFd> {
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if let Some(route) = self.irq_routes.get(&index) {
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return route.notifier();
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}
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None
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}
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fn update(&self, index: InterruptIndex, config: InterruptSourceConfig) -> Result<()> {
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if let Some(route) = self.irq_routes.get(&index) {
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let entry = RoutingEntry::<_>::make_entry(&self.vm, route.gsi, &config)?;
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let mut routes = self.gsi_msi_routes.lock().unwrap();
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routes.insert(route.gsi, *entry);
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return self.set_gsi_routes(&routes);
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}
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Err(io::Error::new(
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io::ErrorKind::Other,
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format!("update: Invalid interrupt index {}", index),
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))
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}
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fn mask(&self, index: InterruptIndex) -> Result<()> {
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if let Some(route) = self.irq_routes.get(&index) {
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let mut routes = self.gsi_msi_routes.lock().unwrap();
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if let Some(entry) = routes.get_mut(&route.gsi) {
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entry.masked = true;
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} else {
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return Err(io::Error::new(
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io::ErrorKind::Other,
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format!("mask: No existing route for interrupt index {}", index),
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));
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}
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self.set_gsi_routes(&routes)?;
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return route.disable(&self.vm);
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}
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Err(io::Error::new(
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io::ErrorKind::Other,
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format!("mask: Invalid interrupt index {}", index),
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))
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}
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fn unmask(&self, index: InterruptIndex) -> Result<()> {
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if let Some(route) = self.irq_routes.get(&index) {
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let mut routes = self.gsi_msi_routes.lock().unwrap();
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if let Some(entry) = routes.get_mut(&route.gsi) {
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entry.masked = false;
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} else {
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return Err(io::Error::new(
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io::ErrorKind::Other,
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format!("mask: No existing route for interrupt index {}", index),
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));
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}
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self.set_gsi_routes(&routes)?;
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return route.enable(&self.vm);
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}
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Err(io::Error::new(
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io::ErrorKind::Other,
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format!("unmask: Invalid interrupt index {}", index),
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))
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}
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}
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pub struct LegacyUserspaceInterruptGroup {
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ioapic: Arc<Mutex<dyn InterruptController>>,
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irq: u32,
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}
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impl LegacyUserspaceInterruptGroup {
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fn new(ioapic: Arc<Mutex<dyn InterruptController>>, irq: u32) -> Self {
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LegacyUserspaceInterruptGroup { ioapic, irq }
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}
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}
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impl InterruptSourceGroup for LegacyUserspaceInterruptGroup {
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fn trigger(&self, _index: InterruptIndex) -> Result<()> {
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self.ioapic
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.lock()
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.unwrap()
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.service_irq(self.irq as usize)
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.map_err(|e| {
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io::Error::new(
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io::ErrorKind::Other,
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format!("failed to inject IRQ #{}: {:?}", self.irq, e),
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)
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})
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}
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fn update(&self, _index: InterruptIndex, _config: InterruptSourceConfig) -> Result<()> {
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Ok(())
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}
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}
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pub struct LegacyUserspaceInterruptManager {
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ioapic: Arc<Mutex<dyn InterruptController>>,
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}
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pub struct MsiInterruptManager<E> {
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allocator: Arc<Mutex<SystemAllocator>>,
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vm: Arc<dyn hypervisor::Vm>,
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gsi_msi_routes: Arc<Mutex<HashMap<u32, RoutingEntry<E>>>>,
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}
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impl LegacyUserspaceInterruptManager {
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pub fn new(ioapic: Arc<Mutex<dyn InterruptController>>) -> Self {
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LegacyUserspaceInterruptManager { ioapic }
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}
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}
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impl<E> MsiInterruptManager<E> {
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pub fn new(allocator: Arc<Mutex<SystemAllocator>>, vm: Arc<dyn hypervisor::Vm>) -> Self {
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// Create a shared list of GSI that can be shared through all PCI
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// devices. This way, we can maintain the full list of used GSI,
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// preventing one device from overriding interrupts setting from
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// another one.
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let gsi_msi_routes = Arc::new(Mutex::new(HashMap::new()));
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MsiInterruptManager {
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allocator,
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vm,
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gsi_msi_routes,
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}
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}
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}
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impl InterruptManager for LegacyUserspaceInterruptManager {
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type GroupConfig = LegacyIrqGroupConfig;
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fn create_group(
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&self,
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config: Self::GroupConfig,
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) -> Result<Arc<Box<dyn InterruptSourceGroup>>> {
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Ok(Arc::new(Box::new(LegacyUserspaceInterruptGroup::new(
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self.ioapic.clone(),
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config.irq as u32,
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))))
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}
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fn destroy_group(&self, _group: Arc<Box<dyn InterruptSourceGroup>>) -> Result<()> {
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Ok(())
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}
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}
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impl<E> InterruptManager for MsiInterruptManager<E>
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where
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E: Send + Sync + 'static,
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RoutingEntry<E>: RoutingEntryExt,
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MsiInterruptGroup<E>: MsiInterruptGroupOps<E>,
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{
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type GroupConfig = MsiIrqGroupConfig;
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fn create_group(
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&self,
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config: Self::GroupConfig,
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) -> Result<Arc<Box<dyn InterruptSourceGroup>>> {
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let mut allocator = self.allocator.lock().unwrap();
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let mut irq_routes: HashMap<InterruptIndex, InterruptRoute> =
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HashMap::with_capacity(config.count as usize);
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for i in config.base..config.base + config.count {
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irq_routes.insert(i, InterruptRoute::new(&mut allocator)?);
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}
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Ok(Arc::new(Box::new(MsiInterruptGroup::new(
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self.vm.clone(),
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self.gsi_msi_routes.clone(),
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irq_routes,
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))))
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}
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fn destroy_group(&self, _group: Arc<Box<dyn InterruptSourceGroup>>) -> Result<()> {
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Ok(())
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}
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}
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pub mod kvm {
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use super::*;
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use hypervisor::kvm::KVM_MSI_VALID_DEVID;
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use hypervisor::kvm::{kvm_irq_routing_entry, KVM_IRQ_ROUTING_MSI};
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type KvmMsiInterruptGroup = MsiInterruptGroup<kvm_irq_routing_entry>;
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type KvmRoutingEntry = RoutingEntry<kvm_irq_routing_entry>;
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pub type KvmMsiInterruptManager = MsiInterruptManager<kvm_irq_routing_entry>;
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impl RoutingEntryExt for KvmRoutingEntry {
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fn make_entry(
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vm: &Arc<dyn hypervisor::Vm>,
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gsi: u32,
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config: &InterruptSourceConfig,
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) -> Result<Box<Self>> {
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if let InterruptSourceConfig::MsiIrq(cfg) = &config {
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let mut kvm_route = kvm_irq_routing_entry {
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gsi,
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type_: KVM_IRQ_ROUTING_MSI,
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..Default::default()
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};
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kvm_route.u.msi.address_lo = cfg.low_addr;
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kvm_route.u.msi.address_hi = cfg.high_addr;
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kvm_route.u.msi.data = cfg.data;
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if vm.check_extension(hypervisor::Cap::MsiDevid) {
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kvm_route.flags = KVM_MSI_VALID_DEVID;
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kvm_route.u.msi.__bindgen_anon_1.devid = cfg.devid;
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}
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let kvm_entry = KvmRoutingEntry {
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route: kvm_route,
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masked: false,
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};
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return Ok(Box::new(kvm_entry));
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}
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Err(io::Error::new(
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io::ErrorKind::Other,
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"Interrupt config type not supported",
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))
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}
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}
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impl MsiInterruptGroupOps<kvm_irq_routing_entry> for KvmMsiInterruptGroup {
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fn set_gsi_routes(
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&self,
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routes: &HashMap<u32, RoutingEntry<kvm_irq_routing_entry>>,
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) -> Result<()> {
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let mut entry_vec: Vec<kvm_irq_routing_entry> = Vec::new();
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for (_, entry) in routes.iter() {
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if entry.masked {
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continue;
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}
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entry_vec.push(entry.route);
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}
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self.vm.set_gsi_routing(&entry_vec).map_err(|e| {
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io::Error::new(
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io::ErrorKind::Other,
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format!("Failed setting GSI routing: {}", e),
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)
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})
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}
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}
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}
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#[cfg(target_arch = "aarch64")]
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#[cfg(test)]
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mod tests {
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use arch::aarch64::gic::kvm::{create_gic, save_pending_tables};
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use arch::aarch64::gic::{
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get_dist_regs, get_icc_regs, get_redist_regs, set_dist_regs, set_icc_regs, set_redist_regs,
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};
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#[test]
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fn test_create_gic() {
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let hv = hypervisor::new().unwrap();
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let vm = hv.create_vm().unwrap();
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assert!(create_gic(&vm, 1).is_ok());
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}
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#[test]
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fn test_get_set_dist_regs() {
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let hv = hypervisor::new().unwrap();
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let vm = hv.create_vm().unwrap();
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let _ = vm.create_vcpu(0, None).unwrap();
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let gic = create_gic(&vm, 1).expect("Cannot create gic");
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let res = get_dist_regs(gic.device());
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assert!(res.is_ok());
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let state = res.unwrap();
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assert_eq!(state.len(), 244);
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let res = set_dist_regs(gic.device(), &state);
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assert!(res.is_ok());
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}
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#[test]
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fn test_get_set_redist_regs() {
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let hv = hypervisor::new().unwrap();
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let vm = hv.create_vm().unwrap();
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let _ = vm.create_vcpu(0, None).unwrap();
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let gic = create_gic(&vm, 1).expect("Cannot create gic");
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let mut gicr_typer = Vec::new();
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gicr_typer.push(123);
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let res = get_redist_regs(gic.device(), &gicr_typer);
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assert!(res.is_ok());
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let state = res.unwrap();
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println!("{}", state.len());
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assert!(state.len() == 24);
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assert!(set_redist_regs(gic.device(), &gicr_typer, &state).is_ok());
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}
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#[test]
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fn test_get_set_icc_regs() {
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let hv = hypervisor::new().unwrap();
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let vm = hv.create_vm().unwrap();
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let _ = vm.create_vcpu(0, None).unwrap();
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let gic = create_gic(&vm, 1).expect("Cannot create gic");
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let mut gicr_typer = Vec::new();
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gicr_typer.push(123);
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let res = get_icc_regs(gic.device(), &gicr_typer);
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assert!(res.is_ok());
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let state = res.unwrap();
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println!("{}", state.len());
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assert!(state.len() == 9);
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assert!(set_icc_regs(gic.device(), &gicr_typer, &state).is_ok());
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}
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#[test]
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fn test_save_pending_tables() {
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let hv = hypervisor::new().unwrap();
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let vm = hv.create_vm().unwrap();
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let _ = vm.create_vcpu(0, None).unwrap();
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let gic = create_gic(&vm, 1).expect("Cannot create gic");
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assert!(save_pending_tables(gic.device()).is_ok());
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}
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}
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