cloud-hypervisor/pci/src
Rob Bradford 89a2562c5a pci: Optimise MSI-X table programming
With an updated Linux kernel the kernel reprograms the same table entry
in the MSI-X table multiple times. Fortunately it does so with entry
masked (the default.)

The costly part of MSI-X table reprogramming is going out to the host
kernel to update the GSI routing entries. This change makes three
optimisations.

1. If the table entry is unchanged: skip handking updates
2. Only update the GSI routing table if the table entry is unmasked
   (this skips extra calls to the ioctl() for reprogramming the
    entries.)
3. Only generate a message on entry unmasking if the global MSI-X enable
   bit is set.

Fixes: #4273

Signed-off-by: Rob Bradford <robert.bradford@intel.com>
2022-10-07 09:57:27 -07:00
..
bus.rs pci: Replace BAR tuple with PciBarConfiguration 2022-04-19 12:54:09 -07:00
configuration.rs pci: vfio: Filter out some PCI extended capabilities 2022-08-08 18:29:16 +02:00
device.rs vmm: Use new Resource type PciBar 2022-04-19 12:54:09 -07:00
lib.rs pci: vfio: Filter out some PCI extended capabilities 2022-08-08 18:29:16 +02:00
msi.rs pci: msi: Make MsiCap field public 2022-06-09 09:19:58 +02:00
msix.rs pci: Optimise MSI-X table programming 2022-10-07 09:57:27 -07:00
vfio_user.rs pci: vfio: Filter out some PCI extended capabilities 2022-08-08 18:29:16 +02:00
vfio.rs pci: vfio: Filter out some PCI extended capabilities 2022-08-08 18:29:16 +02:00