Rob Bradford ffaab46934 misc: Use a more relaxed memory model when possible ... When a total ordering between multiple atomic variables is not required then use Ordering::Acquire with atomic loads and Ordering::Release with atomic stores. This will improve performance as this does not require a memory fence on x86_64 which Ordering::SeqCst will use. Add a comment to the code in the vCPU handling code where it operates on multiple atomics to explain why Ordering::SeqCst is required. Signed-off-by: Rob Bradford <robert.bradford@intel.com>		2020-12-02 19:04:30 +01:00
..
transport	misc: Use a more relaxed memory model when possible	2020-12-02 19:04:30 +01:00
vhost_user	pci, virtio-devices: Fix rust 1.48 clippy warnings	2020-11-20 17:09:28 +01:00
vsock	pci, virtio-devices: Fix rust 1.48 clippy warnings	2020-11-20 17:09:28 +01:00
balloon.rs	misc: Use a more relaxed memory model when possible	2020-12-02 19:04:30 +01:00
block_io_uring.rs	misc: Use a more relaxed memory model when possible	2020-12-02 19:04:30 +01:00
block.rs	misc: Use a more relaxed memory model when possible	2020-12-02 19:04:30 +01:00
console.rs	misc: Use a more relaxed memory model when possible	2020-12-02 19:04:30 +01:00
device.rs
epoll_helper.rs
iommu.rs
lib.rs	virtio-devices: Add simple virtio-watchdog device	2020-10-21 16:02:39 +01:00
mem.rs	misc: Use a more relaxed memory model when possible	2020-12-02 19:04:30 +01:00
net_util.rs
net.rs
pmem.rs	virtio: Replace some repr(C, packed) with repr(C)	2020-10-07 22:11:36 +02:00
rng.rs
seccomp_filters.rs	virtio-devices: seccomp_filters: Add fsync to block io_uring filter	2020-10-27 10:53:54 +00:00
watchdog.rs	virtio-devices: Add simple virtio-watchdog device	2020-10-21 16:02:39 +01:00