cloud-hypervisor/pci/src
Sebastien Boeuf 4d98dcb077 msix: Handle MSI-X device masking
As mentioned in the PCI specification, the Function Mask from the
Message Control Register can be set to prevent a device from injecting
MSI-X messages. This supersedes the vector masking as it interacts at
the device level.

Here quoted from the specification:
For MSI and MSI-X, while a vector is masked, the function is prohibited
from sending the associated message, and the function must set the
associated Pending bit whenever the function would otherwise send the
message. When software unmasks a vector whose associated Pending bit is
set, the function must schedule sending the associated message, and
clear the Pending bit as soon as the message has been sent. Note that
clearing the MSI-X Function Mask bit may result in many messages
needing to be sent.

This commit implements the behavior described above by reorganizing
the way the PCI configuration space is being written. It is indeed
important to be able to catch a change in the Message Control
Register without having to implement it for every PciDevice
implementation. Instead, the PciConfiguration has been modified to
take care of handling any update made to this register.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-06-07 13:33:53 +01:00
..
configuration.rs msix: Handle MSI-X device masking 2019-06-07 13:33:53 +01:00
device.rs msix: Handle MSI-X device masking 2019-06-07 13:33:53 +01:00
lib.rs interrupt: Use a single closure to describe pin based and MSI-X 2019-06-06 15:27:35 +01:00
msix.rs msix: Handle MSI-X device masking 2019-06-07 13:33:53 +01:00
root.rs msix: Handle MSI-X device masking 2019-06-07 13:33:53 +01:00