cloud-hypervisor/pci/src
Sebastien Boeuf a548a01423 pci: Fix MSI-X table and PBA offsets
The offsets returned by the table_offset() and pba_offset() function
were wrong as they were shifting the value by 3 bits. The MSI-X spec
defines the MSI-X table and PBA offsets as being defined on 3-31 bits,
but this does not mean it has to be shifted. Instead, the address is
still on 32 bits and assumes the LSB bits 0-2 are set to 0.

VFIO was working fine with devices were the MSI-X offset were 0x0, but
the bug was found on a device where the offset was non-null.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-08-02 09:45:20 +02:00
..
bus.rs pci: Disable multiple functions 2019-07-31 09:28:29 +02:00
configuration.rs pci: Add support for expansion ROM BAR 2019-07-31 09:28:29 +02:00
device.rs pci: Allow for registering IO and Memory BAR 2019-07-22 09:50:10 -07:00
lib.rs pci: Add MSI capability structure 2019-07-22 09:50:10 -07:00
msi.rs pci: Add MSI capability structure 2019-07-22 09:50:10 -07:00
msix.rs pci: Fix MSI-X table and PBA offsets 2019-08-02 09:45:20 +02:00