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While non-Intel CPU architectures don't have a special concept of IO address space, support for PCI I/O regions is still needed to be able to handle PCI devices that use them. With this change, I'm able to pass through an e1000e device from QEMU to a cloud-hypervisor VM on aarch64 and use it in the cloud-hypervisor guest. Previously, it would hit the unimplemented!(). Signed-off-by: Alyssa Ross <hi@alyssa.is> |
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.. | ||
api | ||
igvm | ||
acpi.rs | ||
clone3.rs | ||
config.rs | ||
console_devices.rs | ||
coredump.rs | ||
cpu.rs | ||
device_manager.rs | ||
device_tree.rs | ||
gdb.rs | ||
interrupt.rs | ||
landlock.rs | ||
lib.rs | ||
memory_manager.rs | ||
migration.rs | ||
pci_segment.rs | ||
seccomp_filters.rs | ||
serial_manager.rs | ||
sigwinch_listener.rs | ||
vm_config.rs | ||
vm.rs |