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cloud-hypervisor/pci
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Sebastien Boeuf d217089b54 pci: Add support for expansion ROM BAR 
The expansion ROM BAR can be considered like a 32-bit memory BAR with a
slight difference regarding the amount of reserved bits at the beginning
of its 32-bit value. Bit 0 indicates if the BAR is enabled or disabled,
while bits 1-10 are reserved. The remaining upper 21 bits hold the BAR
address.

This commit extends the pci crate in order to support expansion ROM BAR.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
2019-07-31 09:28:29 +02:00
..
src pci: Add support for expansion ROM BAR 2019-07-31 09:28:29 +02:00
Cargo.toml dep: Rely on latest kvm-ioctls crate 2019-06-06 15:27:35 +01:00