Rob Bradford 9c6e7c4a4b pci: Support DWORD/4-byte writes to the MSI-X control register ... The PCI spec does not specify that the access has to be of a specific size. Fixes: #3714 Signed-off-by: Rob Bradford <robert.bradford@intel.com>		2022-02-17 14:13:45 +00:00
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bus.rs	vmm: Use PciBdf throughout in order to remove manual bit manipulation	2021-11-02 16:55:42 +00:00
configuration.rs	pci: Support DWORD/4-byte writes to the MSI-X control register	2022-02-17 14:13:45 +00:00
device.rs	vmm, pci: Fix potential deadlock in PCI BAR allocation	2022-01-06 09:59:36 +01:00
lib.rs	pci, vmm: Update DeviceNode to store PciBdf instead of u32	2022-02-16 11:57:23 +00:00
msi.rs	clippy: Fix redundant allocations	2021-07-29 13:28:57 +02:00
msix.rs	pci: slightly change safety comment style	2021-11-17 14:40:51 +00:00
vfio_user.rs	pci, vmm: Pass PCI BDF to vfio and vfio_user	2022-01-18 18:00:00 -08:00
vfio.rs	pci, vmm: Pass PCI BDF to vfio and vfio_user	2022-01-18 18:00:00 -08:00