Sebastien Boeuf 87195c9ccc pci: Fix vector control read/write from/to MSI-X table ... The vector control offset is at the 4th byte of each MSI-X table entry. For that reason, it is located at 0xc, and not 0x10 as implemented. This commit fixes the current MSI-X code, allowing proper reading and writing of each vector control register in the MSI-X table. Fixes #156 Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>		2019-08-08 08:10:18 +01:00
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src	pci: Fix vector control read/write from/to MSI-X table	2019-08-08 08:10:18 +01:00
Cargo.toml	build: Bulk update dependencies	2019-08-02 15:22:37 +02:00