mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-07-02 16:02:37 +00:00
a6878accd5
When the running OS has been told that a CPU should be removed it will shutdown the CPU and then signal to the hypervisor via the "_EJ0" method on the device that ultimately writes into an I/O port than the vCPU should be shutdown. Upon notification the hypervisor signals to the individual thread that it should shutdown and waits for that thread to end. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
1070 lines
36 KiB
Rust
1070 lines
36 KiB
Rust
// Copyright 2018 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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//
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// Portions Copyright 2017 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE-BSD-3-Clause file.
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//
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// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0 AND BSD-3-Clause
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//
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use std::os::unix::thread::JoinHandleExt;
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use std::sync::atomic::{AtomicBool, Ordering};
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use std::sync::{Arc, Barrier, Mutex, RwLock, Weak};
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use std::thread;
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use std::{fmt, io, result};
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use libc::{c_void, siginfo_t};
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use crate::device_manager::DeviceManager;
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#[cfg(feature = "acpi")]
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use acpi_tables::{aml, aml::Aml, sdt::SDT};
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use arch::layout;
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use devices::{ioapic, BusDevice};
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use kvm_bindings::CpuId;
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use kvm_ioctls::*;
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use vm_device::{Migratable, MigratableError, Pausable, Snapshotable};
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use vm_memory::{Address, GuestAddress, GuestMemoryMmap};
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use vmm_sys_util::eventfd::EventFd;
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use vmm_sys_util::signal::{register_signal_handler, SIGRTMIN};
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// Debug I/O port
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#[cfg(target_arch = "x86_64")]
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const DEBUG_IOPORT: u16 = 0x80;
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const DEBUG_IOPORT_PREFIX: &str = "Debug I/O port";
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/// Debug I/O port, see:
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/// https://www.intel.com/content/www/us/en/support/articles/000005500/boards-and-kits.html
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///
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/// Since we're not a physical platform, we can freely assign code ranges for
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/// debugging specific parts of our virtual platform.
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pub enum DebugIoPortRange {
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Firmware,
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Bootloader,
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Kernel,
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Userspace,
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Custom,
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}
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impl DebugIoPortRange {
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fn from_u8(value: u8) -> DebugIoPortRange {
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match value {
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0x00..=0x1f => DebugIoPortRange::Firmware,
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0x20..=0x3f => DebugIoPortRange::Bootloader,
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0x40..=0x5f => DebugIoPortRange::Kernel,
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0x60..=0x7f => DebugIoPortRange::Userspace,
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_ => DebugIoPortRange::Custom,
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}
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}
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}
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impl fmt::Display for DebugIoPortRange {
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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match self {
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DebugIoPortRange::Firmware => write!(f, "{}: Firmware", DEBUG_IOPORT_PREFIX),
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DebugIoPortRange::Bootloader => write!(f, "{}: Bootloader", DEBUG_IOPORT_PREFIX),
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DebugIoPortRange::Kernel => write!(f, "{}: Kernel", DEBUG_IOPORT_PREFIX),
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DebugIoPortRange::Userspace => write!(f, "{}: Userspace", DEBUG_IOPORT_PREFIX),
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DebugIoPortRange::Custom => write!(f, "{}: Custom", DEBUG_IOPORT_PREFIX),
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}
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}
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}
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#[derive(Debug)]
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pub enum Error {
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/// Cannot open the VCPU file descriptor.
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VcpuFd(kvm_ioctls::Error),
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/// Cannot run the VCPUs.
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VcpuRun(kvm_ioctls::Error),
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/// Cannot spawn a new vCPU thread.
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VcpuSpawn(io::Error),
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#[cfg(target_arch = "x86_64")]
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/// Error configuring the general purpose registers
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REGSConfiguration(arch::x86_64::regs::Error),
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#[cfg(target_arch = "x86_64")]
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/// Error configuring the special registers
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SREGSConfiguration(arch::x86_64::regs::Error),
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#[cfg(target_arch = "x86_64")]
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/// Error configuring the floating point related registers
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FPUConfiguration(arch::x86_64::regs::Error),
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/// The call to KVM_SET_CPUID2 failed.
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SetSupportedCpusFailed(kvm_ioctls::Error),
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#[cfg(target_arch = "x86_64")]
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/// Cannot set the local interruption due to bad configuration.
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LocalIntConfiguration(arch::x86_64::interrupts::Error),
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#[cfg(target_arch = "x86_64")]
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/// Error configuring the MSR registers
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MSRSConfiguration(arch::x86_64::regs::Error),
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/// Unexpected KVM_RUN exit reason
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VcpuUnhandledKvmExit,
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/// Failed to join on vCPU threads
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ThreadCleanup,
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/// Cannot add legacy device to Bus.
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BusError(devices::BusError),
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/// Failed to allocate IO port
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AllocateIOPort,
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/// Asking for more vCPUs that we can have
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DesiredVCPUCountExceedsMax,
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}
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pub type Result<T> = result::Result<T, Error>;
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#[allow(dead_code)]
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#[derive(Copy, Clone)]
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enum CpuidReg {
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EAX,
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EBX,
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ECX,
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EDX,
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}
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pub struct CpuidPatch {
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pub function: u32,
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pub index: u32,
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pub flags_bit: Option<u8>,
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pub eax_bit: Option<u8>,
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pub ebx_bit: Option<u8>,
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pub ecx_bit: Option<u8>,
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pub edx_bit: Option<u8>,
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}
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impl CpuidPatch {
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fn set_cpuid_reg(
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cpuid: &mut CpuId,
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function: u32,
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index: Option<u32>,
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reg: CpuidReg,
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value: u32,
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) {
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let entries = cpuid.as_mut_slice();
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for entry in entries.iter_mut() {
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if entry.function == function && (index == None || index.unwrap() == entry.index) {
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match reg {
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CpuidReg::EAX => {
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entry.eax = value;
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}
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CpuidReg::EBX => {
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entry.ebx = value;
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}
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CpuidReg::ECX => {
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entry.ecx = value;
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}
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CpuidReg::EDX => {
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entry.edx = value;
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}
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}
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}
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}
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}
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pub fn patch_cpuid(cpuid: &mut CpuId, patches: Vec<CpuidPatch>) {
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let entries = cpuid.as_mut_slice();
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for entry in entries.iter_mut() {
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for patch in patches.iter() {
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if entry.function == patch.function && entry.index == patch.index {
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if let Some(flags_bit) = patch.flags_bit {
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entry.flags |= 1 << flags_bit;
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}
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if let Some(eax_bit) = patch.eax_bit {
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entry.eax |= 1 << eax_bit;
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}
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if let Some(ebx_bit) = patch.ebx_bit {
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entry.ebx |= 1 << ebx_bit;
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}
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if let Some(ecx_bit) = patch.ecx_bit {
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entry.ecx |= 1 << ecx_bit;
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}
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if let Some(edx_bit) = patch.edx_bit {
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entry.edx |= 1 << edx_bit;
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}
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}
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}
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}
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}
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}
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#[repr(packed)]
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struct LocalAPIC {
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pub r#type: u8,
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pub length: u8,
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pub processor_id: u8,
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pub apic_id: u8,
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pub flags: u32,
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}
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#[repr(packed)]
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#[derive(Default)]
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struct IOAPIC {
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pub r#type: u8,
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pub length: u8,
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pub ioapic_id: u8,
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_reserved: u8,
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pub apic_address: u32,
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pub gsi_base: u32,
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}
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#[repr(packed)]
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#[derive(Default)]
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struct InterruptSourceOverride {
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pub r#type: u8,
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pub length: u8,
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pub bus: u8,
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pub source: u8,
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pub gsi: u32,
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pub flags: u16,
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}
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/// A wrapper around creating and using a kvm-based VCPU.
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pub struct Vcpu {
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fd: VcpuFd,
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id: u8,
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io_bus: Arc<devices::Bus>,
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mmio_bus: Arc<devices::Bus>,
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ioapic: Option<Arc<Mutex<ioapic::Ioapic>>>,
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vm_ts: std::time::Instant,
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}
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impl Vcpu {
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/// Constructs a new VCPU for `vm`.
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///
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/// # Arguments
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///
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/// * `id` - Represents the CPU number between [0, max vcpus).
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/// * `vm` - The virtual machine this vcpu will get attached to.
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pub fn new(
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id: u8,
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fd: &Arc<VmFd>,
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io_bus: Arc<devices::Bus>,
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mmio_bus: Arc<devices::Bus>,
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ioapic: Option<Arc<Mutex<ioapic::Ioapic>>>,
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creation_ts: std::time::Instant,
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) -> Result<Self> {
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let kvm_vcpu = fd.create_vcpu(id).map_err(Error::VcpuFd)?;
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// Initially the cpuid per vCPU is the one supported by this VM.
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Ok(Vcpu {
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fd: kvm_vcpu,
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id,
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io_bus,
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mmio_bus,
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ioapic,
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vm_ts: creation_ts,
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})
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}
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/// Configures a x86_64 specific vcpu and should be called once per vcpu from the vcpu's thread.
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///
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/// # Arguments
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///
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/// * `machine_config` - Specifies necessary info used for the CPUID configuration.
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/// * `kernel_start_addr` - Offset from `guest_mem` at which the kernel starts.
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/// * `vm` - The virtual machine this vcpu will get attached to.
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pub fn configure(
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&mut self,
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kernel_start_addr: Option<GuestAddress>,
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vm_memory: &Arc<RwLock<GuestMemoryMmap>>,
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cpuid: CpuId,
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) -> Result<()> {
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let mut cpuid = cpuid;
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CpuidPatch::set_cpuid_reg(&mut cpuid, 0xb, None, CpuidReg::EDX, u32::from(self.id));
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self.fd
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.set_cpuid2(&cpuid)
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.map_err(Error::SetSupportedCpusFailed)?;
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arch::x86_64::regs::setup_msrs(&self.fd).map_err(Error::MSRSConfiguration)?;
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if let Some(kernel_start_addr) = kernel_start_addr {
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// Safe to unwrap because this method is called after the VM is configured
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arch::x86_64::regs::setup_regs(
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&self.fd,
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kernel_start_addr.raw_value(),
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arch::x86_64::layout::BOOT_STACK_POINTER.raw_value(),
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arch::x86_64::layout::ZERO_PAGE_START.raw_value(),
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)
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.map_err(Error::REGSConfiguration)?;
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arch::x86_64::regs::setup_fpu(&self.fd).map_err(Error::FPUConfiguration)?;
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arch::x86_64::regs::setup_sregs(&vm_memory.read().unwrap(), &self.fd)
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.map_err(Error::SREGSConfiguration)?;
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}
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arch::x86_64::interrupts::set_lint(&self.fd).map_err(Error::LocalIntConfiguration)?;
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Ok(())
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}
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/// Runs the VCPU until it exits, returning the reason.
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///
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/// Note that the state of the VCPU and associated VM must be setup first for this to do
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/// anything useful.
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pub fn run(&self) -> Result<bool> {
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match self.fd.run() {
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Ok(run) => match run {
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VcpuExit::IoIn(addr, data) => {
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self.io_bus.read(u64::from(addr), data);
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Ok(true)
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}
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VcpuExit::IoOut(addr, data) => {
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if addr == DEBUG_IOPORT && data.len() == 1 {
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self.log_debug_ioport(data[0]);
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}
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self.io_bus.write(u64::from(addr), data);
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Ok(true)
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}
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VcpuExit::MmioRead(addr, data) => {
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self.mmio_bus.read(addr as u64, data);
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Ok(true)
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}
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VcpuExit::MmioWrite(addr, data) => {
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self.mmio_bus.write(addr as u64, data);
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Ok(true)
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}
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VcpuExit::IoapicEoi(vector) => {
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if let Some(ioapic) = &self.ioapic {
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ioapic.lock().unwrap().end_of_interrupt(vector);
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}
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Ok(true)
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}
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VcpuExit::Shutdown => {
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// Triple fault to trigger a reboot
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Ok(false)
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}
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r => {
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error!("Unexpected exit reason on vcpu run: {:?}", r);
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Err(Error::VcpuUnhandledKvmExit)
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}
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},
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Err(ref e) => match e.errno() {
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libc::EAGAIN | libc::EINTR => Ok(true),
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_ => {
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error!("VCPU {:?} error {:?}", self.id, e);
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Err(Error::VcpuUnhandledKvmExit)
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}
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},
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}
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}
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// Log debug io port codes.
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fn log_debug_ioport(&self, code: u8) {
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let ts = self.vm_ts.elapsed();
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debug!(
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"[{} code 0x{:x}] {}.{:>06} seconds",
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DebugIoPortRange::from_u8(code),
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code,
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ts.as_secs(),
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ts.as_micros()
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);
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}
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}
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pub struct CpuManager {
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boot_vcpus: u8,
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max_vcpus: u8,
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io_bus: Weak<devices::Bus>,
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mmio_bus: Arc<devices::Bus>,
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ioapic: Option<Arc<Mutex<ioapic::Ioapic>>>,
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vm_memory: Arc<RwLock<GuestMemoryMmap>>,
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cpuid: CpuId,
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fd: Arc<VmFd>,
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vcpus_kill_signalled: Arc<AtomicBool>,
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vcpus_pause_signalled: Arc<AtomicBool>,
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reset_evt: EventFd,
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vcpu_states: Vec<VcpuState>,
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selected_cpu: u8,
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}
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const CPU_ENABLE_FLAG: usize = 0;
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const CPU_INSERTING_FLAG: usize = 1;
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const CPU_REMOVING_FLAG: usize = 2;
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const CPU_EJECT_FLAG: usize = 3;
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const CPU_STATUS_OFFSET: u64 = 4;
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const CPU_SELECTION_OFFSET: u64 = 0;
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impl BusDevice for CpuManager {
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fn read(&mut self, _base: u64, offset: u64, data: &mut [u8]) {
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match offset {
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CPU_STATUS_OFFSET => {
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if self.selected_cpu < self.present_vcpus() {
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let state = &self.vcpu_states[usize::from(self.selected_cpu)];
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if state.active() {
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data[0] |= 1 << CPU_ENABLE_FLAG;
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}
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if state.inserting {
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data[0] |= 1 << CPU_INSERTING_FLAG;
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}
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if state.removing {
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data[0] |= 1 << CPU_REMOVING_FLAG;
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}
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}
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}
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_ => {
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warn!(
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"Unexpected offset for accessing CPU manager device: {:#}",
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offset
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);
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}
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}
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}
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fn write(&mut self, _base: u64, offset: u64, data: &[u8]) {
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match offset {
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CPU_SELECTION_OFFSET => {
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self.selected_cpu = data[0];
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}
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CPU_STATUS_OFFSET => {
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let state = &mut self.vcpu_states[usize::from(self.selected_cpu)];
|
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// The ACPI code writes back a 1 to acknowledge the insertion
|
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if (data[0] & (1 << CPU_INSERTING_FLAG) == 1 << CPU_INSERTING_FLAG)
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&& state.inserting
|
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{
|
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state.inserting = false;
|
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}
|
||
// Ditto for removal
|
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if (data[0] & (1 << CPU_REMOVING_FLAG) == 1 << CPU_REMOVING_FLAG) && state.removing
|
||
{
|
||
state.removing = false;
|
||
}
|
||
// Trigger removal of vCPU
|
||
if data[0] & (1 << CPU_EJECT_FLAG) == 1 << CPU_EJECT_FLAG {
|
||
if let Err(e) = self.remove_vcpu(self.selected_cpu) {
|
||
error!("Error removing vCPU: {:?}", e);
|
||
}
|
||
}
|
||
}
|
||
_ => {
|
||
warn!(
|
||
"Unexpected offset for accessing CPU manager device: {:#}",
|
||
offset
|
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);
|
||
}
|
||
}
|
||
}
|
||
}
|
||
|
||
#[derive(Default)]
|
||
struct VcpuState {
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||
inserting: bool,
|
||
removing: bool,
|
||
handle: Option<thread::JoinHandle<()>>,
|
||
kill: Arc<AtomicBool>,
|
||
}
|
||
|
||
impl VcpuState {
|
||
fn active(&self) -> bool {
|
||
self.handle.is_some()
|
||
}
|
||
|
||
fn signal_thread(&self) {
|
||
if let Some(handle) = self.handle.as_ref() {
|
||
unsafe {
|
||
libc::pthread_kill(handle.as_pthread_t(), SIGRTMIN());
|
||
}
|
||
}
|
||
}
|
||
|
||
fn join_thread(&mut self) -> Result<()> {
|
||
if let Some(handle) = self.handle.take() {
|
||
handle.join().map_err(|_| Error::ThreadCleanup)?
|
||
}
|
||
|
||
Ok(())
|
||
}
|
||
|
||
fn unpark_thread(&self) {
|
||
if let Some(handle) = self.handle.as_ref() {
|
||
handle.thread().unpark()
|
||
}
|
||
}
|
||
}
|
||
|
||
impl CpuManager {
|
||
pub fn new(
|
||
boot_vcpus: u8,
|
||
max_vcpus: u8,
|
||
device_manager: &DeviceManager,
|
||
guest_memory: Arc<RwLock<GuestMemoryMmap>>,
|
||
fd: Arc<VmFd>,
|
||
cpuid: CpuId,
|
||
reset_evt: EventFd,
|
||
) -> Result<Arc<Mutex<CpuManager>>> {
|
||
let mut vcpu_states = Vec::with_capacity(usize::from(max_vcpus));
|
||
vcpu_states.resize_with(usize::from(max_vcpus), VcpuState::default);
|
||
|
||
let cpu_manager = Arc::new(Mutex::new(CpuManager {
|
||
boot_vcpus,
|
||
max_vcpus,
|
||
io_bus: Arc::downgrade(&device_manager.io_bus().clone()),
|
||
mmio_bus: device_manager.mmio_bus().clone(),
|
||
ioapic: device_manager.ioapic().clone(),
|
||
vm_memory: guest_memory,
|
||
cpuid,
|
||
fd,
|
||
vcpus_kill_signalled: Arc::new(AtomicBool::new(false)),
|
||
vcpus_pause_signalled: Arc::new(AtomicBool::new(false)),
|
||
vcpu_states,
|
||
reset_evt,
|
||
selected_cpu: 0,
|
||
}));
|
||
|
||
device_manager
|
||
.allocator()
|
||
.lock()
|
||
.unwrap()
|
||
.allocate_io_addresses(Some(GuestAddress(0x0cd8)), 0x8, None)
|
||
.ok_or(Error::AllocateIOPort)?;
|
||
|
||
cpu_manager
|
||
.lock()
|
||
.unwrap()
|
||
.io_bus
|
||
.upgrade()
|
||
.unwrap()
|
||
.insert(cpu_manager.clone(), 0x0cd8, 0xc)
|
||
.map_err(Error::BusError)?;
|
||
|
||
Ok(cpu_manager)
|
||
}
|
||
|
||
fn activate_vcpus(
|
||
&mut self,
|
||
desired_vcpus: u8,
|
||
entry_addr: Option<GuestAddress>,
|
||
) -> Result<()> {
|
||
if desired_vcpus > self.max_vcpus {
|
||
return Err(Error::DesiredVCPUCountExceedsMax);
|
||
}
|
||
|
||
let creation_ts = std::time::Instant::now();
|
||
let vcpu_thread_barrier = Arc::new(Barrier::new(
|
||
(desired_vcpus - self.present_vcpus() + 1) as usize,
|
||
));
|
||
|
||
for cpu_id in self.present_vcpus()..desired_vcpus {
|
||
let ioapic = if let Some(ioapic) = &self.ioapic {
|
||
Some(ioapic.clone())
|
||
} else {
|
||
None
|
||
};
|
||
|
||
let mut vcpu = Vcpu::new(
|
||
cpu_id,
|
||
&self.fd,
|
||
self.io_bus.clone().upgrade().unwrap(),
|
||
self.mmio_bus.clone(),
|
||
ioapic,
|
||
creation_ts,
|
||
)?;
|
||
|
||
let vcpu_thread_barrier = vcpu_thread_barrier.clone();
|
||
|
||
let reset_evt = self.reset_evt.try_clone().unwrap();
|
||
let vcpu_kill_signalled = self.vcpus_kill_signalled.clone();
|
||
let vcpu_pause_signalled = self.vcpus_pause_signalled.clone();
|
||
|
||
let vcpu_kill = self.vcpu_states[usize::from(cpu_id)].kill.clone();
|
||
let vm_memory = self.vm_memory.clone();
|
||
let cpuid = self.cpuid.clone();
|
||
|
||
let handle = Some(
|
||
thread::Builder::new()
|
||
.name(format!("vcpu{}", vcpu.id))
|
||
.spawn(move || {
|
||
extern "C" fn handle_signal(_: i32, _: *mut siginfo_t, _: *mut c_void) {}
|
||
// This uses an async signal safe handler to kill the vcpu handles.
|
||
register_signal_handler(SIGRTMIN(), handle_signal)
|
||
.expect("Failed to register vcpu signal handler");
|
||
|
||
vcpu.configure(entry_addr, &vm_memory, cpuid)
|
||
.expect("Failed to configure vCPU");
|
||
|
||
// Block until all CPUs are ready.
|
||
vcpu_thread_barrier.wait();
|
||
|
||
loop {
|
||
// vcpu.run() returns false on a KVM_EXIT_SHUTDOWN (triple-fault) so trigger a reset
|
||
match vcpu.run() {
|
||
Err(e) => {
|
||
error!("VCPU generated error: {:?}", e);
|
||
break;
|
||
}
|
||
Ok(true) => {}
|
||
Ok(false) => {
|
||
reset_evt.write(1).unwrap();
|
||
break;
|
||
}
|
||
}
|
||
|
||
// We've been told to terminate
|
||
if vcpu_kill_signalled.load(Ordering::SeqCst)
|
||
|| vcpu_kill.load(Ordering::SeqCst)
|
||
{
|
||
break;
|
||
}
|
||
|
||
// If we are being told to pause, we park the thread
|
||
// until the pause boolean is toggled.
|
||
// The resume operation is responsible for toggling
|
||
// the boolean and unpark the thread.
|
||
// We enter a loop because park() could spuriously
|
||
// return. We will then park() again unless the
|
||
// pause boolean has been toggled.
|
||
while vcpu_pause_signalled.load(Ordering::SeqCst) {
|
||
thread::park();
|
||
}
|
||
}
|
||
})
|
||
.map_err(Error::VcpuSpawn)?,
|
||
);
|
||
|
||
// On hot plug calls into this function entry_addr is None. It is for
|
||
// those hotplug CPU additions that we need to set the inserting flag.
|
||
self.vcpu_states[usize::from(cpu_id)].handle = handle;
|
||
self.vcpu_states[usize::from(cpu_id)].inserting = entry_addr.is_none();
|
||
}
|
||
|
||
// Unblock all CPU threads.
|
||
vcpu_thread_barrier.wait();
|
||
Ok(())
|
||
}
|
||
|
||
fn mark_vcpus_for_removal(&mut self, desired_vcpus: u8) -> Result<()> {
|
||
// Mark vCPUs for removal, actual removal happens on ejection
|
||
for cpu_id in desired_vcpus..self.present_vcpus() {
|
||
self.vcpu_states[usize::from(cpu_id)].removing = true;
|
||
}
|
||
Ok(())
|
||
}
|
||
|
||
fn remove_vcpu(&mut self, cpu_id: u8) -> Result<()> {
|
||
let mut state = &mut self.vcpu_states[usize::from(cpu_id)];
|
||
state.kill.store(true, Ordering::SeqCst);
|
||
state.signal_thread();
|
||
state.join_thread()?;
|
||
state.handle = None;
|
||
Ok(())
|
||
}
|
||
|
||
// Starts all the vCPUs that the VM is booting with. Blocks until all vCPUs are running.
|
||
pub fn start_boot_vcpus(&mut self, entry_addr: GuestAddress) -> Result<()> {
|
||
self.activate_vcpus(self.boot_vcpus(), Some(entry_addr))
|
||
}
|
||
|
||
pub fn resize(&mut self, desired_vcpus: u8) -> Result<()> {
|
||
if desired_vcpus > self.present_vcpus() {
|
||
self.activate_vcpus(desired_vcpus, None)?;
|
||
} else if desired_vcpus < self.present_vcpus() {
|
||
self.mark_vcpus_for_removal(desired_vcpus)?;
|
||
}
|
||
|
||
Ok(())
|
||
}
|
||
|
||
pub fn shutdown(&mut self) -> Result<()> {
|
||
// Tell the vCPUs to stop themselves next time they go through the loop
|
||
self.vcpus_kill_signalled.store(true, Ordering::SeqCst);
|
||
|
||
// Signal to the spawned threads (vCPUs and console signal handler). For the vCPU threads
|
||
// this will interrupt the KVM_RUN ioctl() allowing the loop to check the boolean set
|
||
// above.
|
||
for state in self.vcpu_states.iter() {
|
||
state.signal_thread();
|
||
}
|
||
|
||
// Wait for all the threads to finish. This removes the state from the vector.
|
||
for mut state in self.vcpu_states.drain(..) {
|
||
state.join_thread()?;
|
||
}
|
||
|
||
Ok(())
|
||
}
|
||
|
||
pub fn boot_vcpus(&self) -> u8 {
|
||
self.boot_vcpus
|
||
}
|
||
|
||
pub fn max_vcpus(&self) -> u8 {
|
||
self.max_vcpus
|
||
}
|
||
|
||
fn present_vcpus(&self) -> u8 {
|
||
self.vcpu_states
|
||
.iter()
|
||
.fold(0, |acc, state| acc + state.active() as u8)
|
||
}
|
||
|
||
#[cfg(feature = "acpi")]
|
||
pub fn create_madt(&self) -> SDT {
|
||
// This is also checked in the commandline parsing.
|
||
assert!(self.boot_vcpus <= self.max_vcpus);
|
||
|
||
let mut madt = SDT::new(*b"APIC", 44, 5, *b"CLOUDH", *b"CHMADT ", 1);
|
||
madt.write(36, layout::APIC_START);
|
||
|
||
for cpu in 0..self.max_vcpus {
|
||
let lapic = LocalAPIC {
|
||
r#type: 0,
|
||
length: 8,
|
||
processor_id: cpu,
|
||
apic_id: cpu,
|
||
flags: if cpu < self.boot_vcpus {
|
||
1 << MADT_CPU_ENABLE_FLAG
|
||
} else {
|
||
0
|
||
},
|
||
};
|
||
madt.append(lapic);
|
||
}
|
||
|
||
madt.append(IOAPIC {
|
||
r#type: 1,
|
||
length: 12,
|
||
ioapic_id: 0,
|
||
apic_address: layout::IOAPIC_START.0 as u32,
|
||
gsi_base: 0,
|
||
..Default::default()
|
||
});
|
||
|
||
madt.append(InterruptSourceOverride {
|
||
r#type: 2,
|
||
length: 10,
|
||
bus: 0,
|
||
source: 4,
|
||
gsi: 4,
|
||
flags: 0,
|
||
});
|
||
|
||
madt
|
||
}
|
||
}
|
||
|
||
struct CPU {
|
||
cpu_id: u8,
|
||
}
|
||
|
||
const MADT_CPU_ENABLE_FLAG: usize = 0;
|
||
|
||
#[cfg(feature = "acpi")]
|
||
impl Aml for CPU {
|
||
fn to_aml_bytes(&self) -> Vec<u8> {
|
||
let lapic = LocalAPIC {
|
||
r#type: 0,
|
||
length: 8,
|
||
processor_id: self.cpu_id,
|
||
apic_id: self.cpu_id,
|
||
flags: 1 << MADT_CPU_ENABLE_FLAG,
|
||
};
|
||
|
||
let mut mat_data: Vec<u8> = Vec::new();
|
||
mat_data.resize(std::mem::size_of_val(&lapic), 0);
|
||
unsafe { *(mat_data.as_mut_ptr() as *mut LocalAPIC) = lapic };
|
||
|
||
aml::Device::new(
|
||
format!("C{:03}", self.cpu_id).as_str().into(),
|
||
vec![
|
||
&aml::Name::new("_HID".into(), &"ACPI0007"),
|
||
&aml::Name::new("_UID".into(), &self.cpu_id),
|
||
/*
|
||
_STA return value:
|
||
Bit [0] – Set if the device is present.
|
||
Bit [1] – Set if the device is enabled and decoding its resources.
|
||
Bit [2] – Set if the device should be shown in the UI.
|
||
Bit [3] – Set if the device is functioning properly (cleared if device failed its diagnostics).
|
||
Bit [4] – Set if the battery is present.
|
||
Bits [31:5] – Reserved (must be cleared).
|
||
*/
|
||
&aml::Method::new(
|
||
"_STA".into(),
|
||
0,
|
||
false,
|
||
// Call into CSTA method which will interrogate device
|
||
vec![&aml::Return::new(&aml::MethodCall::new(
|
||
"CSTA".into(),
|
||
vec![&self.cpu_id],
|
||
))],
|
||
),
|
||
// The Linux kernel expects every CPU device to have a _MAT entry
|
||
// containing the LAPIC for this processor with the enabled bit set
|
||
// even it if is disabled in the MADT (non-boot CPU)
|
||
&aml::Name::new("_MAT".into(), &aml::Buffer::new(mat_data)),
|
||
// Trigger CPU ejection
|
||
&aml::Method::new(
|
||
"_EJ0".into(),
|
||
1,
|
||
false,
|
||
// Call into CEJ0 method which will actually eject device
|
||
vec![&aml::Return::new(&aml::MethodCall::new(
|
||
"CEJ0".into(),
|
||
vec![&self.cpu_id],
|
||
))],
|
||
),
|
||
],
|
||
)
|
||
.to_aml_bytes()
|
||
}
|
||
}
|
||
|
||
struct CPUNotify {
|
||
cpu_id: u8,
|
||
}
|
||
|
||
#[cfg(feature = "acpi")]
|
||
impl Aml for CPUNotify {
|
||
fn to_aml_bytes(&self) -> Vec<u8> {
|
||
let object = aml::Path::new(&format!("C{:03}", self.cpu_id));
|
||
aml::If::new(
|
||
&aml::Equal::new(&aml::Arg(0), &self.cpu_id),
|
||
vec![&aml::Notify::new(&object, &aml::Arg(1))],
|
||
)
|
||
.to_aml_bytes()
|
||
}
|
||
}
|
||
|
||
struct CPUMethods {
|
||
max_vcpus: u8,
|
||
}
|
||
|
||
#[cfg(feature = "acpi")]
|
||
impl Aml for CPUMethods {
|
||
fn to_aml_bytes(&self) -> Vec<u8> {
|
||
let mut bytes = Vec::new();
|
||
bytes.extend_from_slice(
|
||
// CPU status method
|
||
&aml::Method::new(
|
||
"CSTA".into(),
|
||
1,
|
||
true,
|
||
vec![
|
||
// Take lock defined above
|
||
&aml::Acquire::new("\\_SB_.PRES.CPLK".into(), 0xfff),
|
||
// Write CPU number (in first argument) to I/O port via field
|
||
&aml::Store::new(&aml::Path::new("\\_SB_.PRES.CSEL"), &aml::Arg(0)),
|
||
&aml::Store::new(&aml::Local(0), &aml::ZERO),
|
||
// Check if CPEN bit is set, if so make the local variable 0xf (see _STA for details of meaning)
|
||
&aml::If::new(
|
||
&aml::Equal::new(&aml::Path::new("\\_SB_.PRES.CPEN"), &aml::ONE),
|
||
vec![&aml::Store::new(&aml::Local(0), &0xfu8)],
|
||
),
|
||
// Release lock
|
||
&aml::Release::new("\\_SB_.PRES.CPLK".into()),
|
||
// Return 0 or 0xf
|
||
&aml::Return::new(&aml::Local(0)),
|
||
],
|
||
)
|
||
.to_aml_bytes(),
|
||
);
|
||
|
||
let mut cpu_notifies = Vec::new();
|
||
for cpu_id in 0..self.max_vcpus {
|
||
cpu_notifies.push(CPUNotify { cpu_id });
|
||
}
|
||
|
||
let mut cpu_notifies_refs: Vec<&dyn aml::Aml> = Vec::new();
|
||
for cpu_id in 0..self.max_vcpus {
|
||
cpu_notifies_refs.push(&cpu_notifies[usize::from(cpu_id)]);
|
||
}
|
||
|
||
bytes.extend_from_slice(
|
||
&aml::Method::new("CTFY".into(), 2, true, cpu_notifies_refs).to_aml_bytes(),
|
||
);
|
||
|
||
bytes.extend_from_slice(
|
||
&aml::Method::new(
|
||
"CEJ0".into(),
|
||
1,
|
||
true,
|
||
vec![
|
||
&aml::Acquire::new("\\_SB_.PRES.CPLK".into(), 0xfff),
|
||
// Write CPU number (in first argument) to I/O port via field
|
||
&aml::Store::new(&aml::Path::new("\\_SB_.PRES.CSEL"), &aml::Arg(0)),
|
||
// Set CEJ0 bit
|
||
&aml::Store::new(&aml::Path::new("\\_SB_.PRES.CEJ0"), &aml::ONE),
|
||
&aml::Release::new("\\_SB_.PRES.CPLK".into()),
|
||
],
|
||
)
|
||
.to_aml_bytes(),
|
||
);
|
||
|
||
bytes.extend_from_slice(
|
||
&aml::Method::new(
|
||
"CSCN".into(),
|
||
0,
|
||
true,
|
||
vec![
|
||
// Take lock defined above
|
||
&aml::Acquire::new("\\_SB_.PRES.CPLK".into(), 0xfff),
|
||
&aml::Store::new(&aml::Local(0), &aml::ZERO),
|
||
&aml::While::new(
|
||
&aml::LessThan::new(&aml::Local(0), &self.max_vcpus),
|
||
vec![
|
||
// Write CPU number (in first argument) to I/O port via field
|
||
&aml::Store::new(&aml::Path::new("\\_SB_.PRES.CSEL"), &aml::Local(0)),
|
||
// Check if CINS bit is set
|
||
&aml::If::new(
|
||
&aml::Equal::new(&aml::Path::new("\\_SB_.PRES.CINS"), &aml::ONE),
|
||
// Notify device if it is
|
||
vec![
|
||
&aml::MethodCall::new(
|
||
"CTFY".into(),
|
||
vec![&aml::Local(0), &aml::ONE],
|
||
),
|
||
// Reset CINS bit
|
||
&aml::Store::new(
|
||
&aml::Path::new("\\_SB_.PRES.CINS"),
|
||
&aml::ONE,
|
||
),
|
||
],
|
||
),
|
||
// Check if CRMV bit is set
|
||
&aml::If::new(
|
||
&aml::Equal::new(&aml::Path::new("\\_SB_.PRES.CRMV"), &aml::ONE),
|
||
// Notify device if it is (with the eject constant 0x3)
|
||
vec![
|
||
&aml::MethodCall::new(
|
||
"CTFY".into(),
|
||
vec![&aml::Local(0), &3u8],
|
||
),
|
||
// Reset CRMV bit
|
||
&aml::Store::new(
|
||
&aml::Path::new("\\_SB_.PRES.CRMV"),
|
||
&aml::ONE,
|
||
),
|
||
],
|
||
),
|
||
&aml::Add::new(&aml::Local(0), &aml::Local(0), &aml::ONE),
|
||
],
|
||
),
|
||
// Release lock
|
||
&aml::Release::new("\\_SB_.PRES.CPLK".into()),
|
||
],
|
||
)
|
||
.to_aml_bytes(),
|
||
);
|
||
bytes
|
||
}
|
||
}
|
||
|
||
#[cfg(feature = "acpi")]
|
||
impl Aml for CpuManager {
|
||
fn to_aml_bytes(&self) -> Vec<u8> {
|
||
let mut bytes = Vec::new();
|
||
// CPU hotplug controller
|
||
bytes.extend_from_slice(
|
||
&aml::Device::new(
|
||
"_SB_.PRES".into(),
|
||
vec![
|
||
&aml::Name::new("_HID".into(), &aml::EISAName::new("PNP0A06")),
|
||
// Mutex to protect concurrent access as we write to choose CPU and then read back status
|
||
&aml::Mutex::new("CPLK".into(), 0),
|
||
// I/O port for CPU controller
|
||
&aml::Name::new(
|
||
"_CRS".into(),
|
||
&aml::ResourceTemplate::new(vec![&aml::IO::new(
|
||
0x0cd8, 0x0cd8, 0x01, 0x0c,
|
||
)]),
|
||
),
|
||
// OpRegion and Fields map I/O port into individual field values
|
||
&aml::OpRegion::new("PRST".into(), aml::OpRegionSpace::SystemIO, 0x0cd8, 0x0c),
|
||
&aml::Field::new(
|
||
"PRST".into(),
|
||
aml::FieldAccessType::Byte,
|
||
aml::FieldUpdateRule::WriteAsZeroes,
|
||
vec![
|
||
aml::FieldEntry::Reserved(32),
|
||
aml::FieldEntry::Named(*b"CPEN", 1),
|
||
aml::FieldEntry::Named(*b"CINS", 1),
|
||
aml::FieldEntry::Named(*b"CRMV", 1),
|
||
aml::FieldEntry::Named(*b"CEJ0", 1),
|
||
aml::FieldEntry::Reserved(4),
|
||
aml::FieldEntry::Named(*b"CCMD", 8),
|
||
],
|
||
),
|
||
&aml::Field::new(
|
||
"PRST".into(),
|
||
aml::FieldAccessType::DWord,
|
||
aml::FieldUpdateRule::Preserve,
|
||
vec![
|
||
aml::FieldEntry::Named(*b"CSEL", 32),
|
||
aml::FieldEntry::Reserved(32),
|
||
aml::FieldEntry::Named(*b"CDAT", 32),
|
||
],
|
||
),
|
||
],
|
||
)
|
||
.to_aml_bytes(),
|
||
);
|
||
|
||
// CPU devices
|
||
let hid = aml::Name::new("_HID".into(), &"ACPI0010");
|
||
let uid = aml::Name::new("_CID".into(), &aml::EISAName::new("PNP0A05"));
|
||
// Bundle methods together under a common object
|
||
let methods = CPUMethods {
|
||
max_vcpus: self.max_vcpus,
|
||
};
|
||
let mut cpu_data_inner: Vec<&dyn aml::Aml> = vec![&hid, &uid, &methods];
|
||
|
||
let mut cpu_devices = Vec::new();
|
||
for cpu_id in 0..self.max_vcpus {
|
||
let cpu_device = CPU { cpu_id };
|
||
|
||
cpu_devices.push(cpu_device);
|
||
}
|
||
|
||
for cpu_device in cpu_devices.iter() {
|
||
cpu_data_inner.push(cpu_device);
|
||
}
|
||
|
||
bytes.extend_from_slice(
|
||
&aml::Device::new("_SB_.CPUS".into(), cpu_data_inner).to_aml_bytes(),
|
||
);
|
||
bytes
|
||
}
|
||
}
|
||
|
||
impl Pausable for CpuManager {
|
||
fn pause(&mut self) -> std::result::Result<(), MigratableError> {
|
||
// Tell the vCPUs to pause themselves next time they exit
|
||
self.vcpus_pause_signalled.store(true, Ordering::SeqCst);
|
||
|
||
// Signal to the spawned threads (vCPUs and console signal handler). For the vCPU threads
|
||
// this will interrupt the KVM_RUN ioctl() allowing the loop to check the boolean set
|
||
// above.
|
||
for state in self.vcpu_states.iter() {
|
||
state.signal_thread();
|
||
}
|
||
|
||
Ok(())
|
||
}
|
||
|
||
fn resume(&mut self) -> std::result::Result<(), MigratableError> {
|
||
// Toggle the vCPUs pause boolean
|
||
self.vcpus_pause_signalled.store(false, Ordering::SeqCst);
|
||
|
||
// Unpark all the VCPU threads.
|
||
// Once unparked, the next thing they will do is checking for the pause
|
||
// boolean. Since it'll be set to false, they will exit their pause loop
|
||
// and go back to vmx root.
|
||
for state in self.vcpu_states.iter() {
|
||
state.unpark_thread();
|
||
}
|
||
Ok(())
|
||
}
|
||
}
|
||
|
||
impl Snapshotable for CpuManager {}
|
||
impl Migratable for CpuManager {}
|