mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
synced 2024-11-05 03:21:13 +00:00
375 lines
12 KiB
Rust
375 lines
12 KiB
Rust
// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0 OR BSD-3-Clause
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//
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// Copyright © 2020, Microsoft Corporation
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//
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// Copyright 2018-2019 CrowdStrike, Inc.
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//
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//
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#[cfg(target_arch = "aarch64")]
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use crate::aarch64::VcpuInit;
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#[cfg(target_arch = "aarch64")]
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use crate::arch::aarch64::gic::Vgic;
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use crate::cpu::Vcpu;
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use crate::device::Device;
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#[cfg(feature = "kvm")]
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use crate::kvm::KvmVmState as VmState;
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#[cfg(feature = "mshv")]
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use crate::mshv::HvState as VmState;
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#[cfg(feature = "tdx")]
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use crate::x86_64::CpuId;
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#[cfg(all(feature = "kvm", target_arch = "x86_64"))]
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use crate::ClockData;
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use crate::CreateDevice;
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use crate::{IoEventAddress, IrqRoutingEntry, MemoryRegion};
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#[cfg(feature = "kvm")]
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use kvm_ioctls::Cap;
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#[cfg(target_arch = "x86_64")]
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use std::fs::File;
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use std::sync::Arc;
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use thiserror::Error;
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use vmm_sys_util::eventfd::EventFd;
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///
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/// I/O events data matches (32 or 64 bits).
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///
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#[derive(Debug)]
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pub enum DataMatch {
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DataMatch32(u32),
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DataMatch64(u64),
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}
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impl From<DataMatch> for u64 {
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fn from(dm: DataMatch) -> u64 {
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match dm {
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DataMatch::DataMatch32(dm) => dm.into(),
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DataMatch::DataMatch64(dm) => dm,
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}
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}
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}
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#[derive(Error, Debug)]
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///
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/// Enum for VM error
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pub enum HypervisorVmError {
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///
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/// Create Vcpu error
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///
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#[error("Failed to create Vcpu: {0}")]
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CreateVcpu(#[source] anyhow::Error),
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///
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/// Identity map address error
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///
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#[error("Failed to set identity map address: {0}")]
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SetIdentityMapAddress(#[source] anyhow::Error),
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///
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/// TSS address error
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///
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#[error("Failed to set TSS address: {0}")]
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SetTssAddress(#[source] anyhow::Error),
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///
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/// Create interrupt controller error
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///
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#[error("Failed to create interrupt controller: {0}")]
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CreateIrq(#[source] anyhow::Error),
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///
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/// Register interrupt event error
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///
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#[error("Failed to register interrupt event: {0}")]
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RegisterIrqFd(#[source] anyhow::Error),
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///
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/// Un register interrupt event error
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///
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#[error("Failed to unregister interrupt event: {0}")]
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UnregisterIrqFd(#[source] anyhow::Error),
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///
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/// Register IO event error
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///
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#[error("Failed to register IO event: {0}")]
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RegisterIoEvent(#[source] anyhow::Error),
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///
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/// Unregister IO event error
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///
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#[error("Failed to unregister IO event: {0}")]
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UnregisterIoEvent(#[source] anyhow::Error),
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///
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/// Set GSI routing error
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///
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#[error("Failed to set GSI routing: {0}")]
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SetGsiRouting(#[source] anyhow::Error),
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///
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/// Create user memory error
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///
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#[error("Failed to create user memory: {0}")]
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CreateUserMemory(#[source] anyhow::Error),
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///
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/// Remove user memory region error
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///
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#[error("Failed to remove user memory: {0}")]
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RemoveUserMemory(#[source] anyhow::Error),
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///
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/// Create device error
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///
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#[error("Failed to set GSI routing: {0}")]
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CreateDevice(#[source] anyhow::Error),
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///
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/// Get preferred target error
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///
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#[error("Failed to get preferred target: {0}")]
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GetPreferredTarget(#[source] anyhow::Error),
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///
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/// Enable split Irq error
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///
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#[error("Failed to enable split Irq: {0}")]
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EnableSplitIrq(#[source] anyhow::Error),
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///
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/// Enable SGX attribute error
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///
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#[error("Failed to enable SGX attribute: {0}")]
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EnableSgxAttribute(#[source] anyhow::Error),
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///
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/// Get clock error
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///
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#[error("Failed to get clock: {0}")]
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GetClock(#[source] anyhow::Error),
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///
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/// Set clock error
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///
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#[error("Failed to set clock: {0}")]
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SetClock(#[source] anyhow::Error),
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///
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/// Create passthrough device
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///
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#[error("Failed to create passthrough device: {0}")]
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CreatePassthroughDevice(#[source] anyhow::Error),
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/// Write to Guest memory
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///
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#[error("Failed to write to guest memory: {0}")]
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GuestMemWrite(#[source] anyhow::Error),
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///
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/// Read Guest memory
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///
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#[error("Failed to read guest memory: {0}")]
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GuestMemRead(#[source] anyhow::Error),
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///
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/// Read from MMIO Bus
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///
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#[error("Failed to read from MMIO Bus: {0}")]
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MmioBusRead(#[source] anyhow::Error),
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///
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/// Write to MMIO Bus
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///
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#[error("Failed to write to MMIO Bus: {0}")]
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MmioBusWrite(#[source] anyhow::Error),
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///
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/// Read from IO Bus
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///
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#[error("Failed to read from IO Bus: {0}")]
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IoBusRead(#[source] anyhow::Error),
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///
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/// Write to IO Bus
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///
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#[error("Failed to write to IO Bus: {0}")]
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IoBusWrite(#[source] anyhow::Error),
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///
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/// Start dirty log error
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///
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#[error("Failed to get dirty log: {0}")]
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StartDirtyLog(#[source] anyhow::Error),
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///
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/// Stop dirty log error
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///
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#[error("Failed to get dirty log: {0}")]
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StopDirtyLog(#[source] anyhow::Error),
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///
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/// Get dirty log error
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///
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#[error("Failed to get dirty log: {0}")]
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GetDirtyLog(#[source] anyhow::Error),
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///
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/// Assert virtual interrupt error
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///
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#[error("Failed to assert virtual Interrupt: {0}")]
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AsserttVirtualInterrupt(#[source] anyhow::Error),
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#[cfg(feature = "tdx")]
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///
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/// Error initializing TDX on the VM
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///
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#[error("Failed to initialize TDX: {0}")]
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InitializeTdx(#[source] std::io::Error),
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#[cfg(feature = "tdx")]
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///
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/// Error finalizing the TDX configuration on the VM
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///
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#[error("Failed to finalize TDX: {0}")]
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FinalizeTdx(#[source] std::io::Error),
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#[cfg(feature = "tdx")]
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///
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/// Error initializing the TDX memory region
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///
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#[error("Failed to initialize memory region TDX: {0}")]
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InitMemRegionTdx(#[source] std::io::Error),
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///
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/// Create Vgic error
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///
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#[error("Failed to create Vgic: {0}")]
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CreateVgic(#[source] anyhow::Error),
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}
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///
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/// Result type for returning from a function
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///
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pub type Result<T> = std::result::Result<T, HypervisorVmError>;
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/// Configuration data for legacy interrupts.
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///
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/// On x86 platforms, legacy interrupts means those interrupts routed through PICs or IOAPICs.
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#[derive(Copy, Clone, Debug)]
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pub struct LegacyIrqSourceConfig {
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pub irqchip: u32,
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pub pin: u32,
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}
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/// Configuration data for MSI/MSI-X interrupts.
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///
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/// On x86 platforms, these interrupts are vectors delivered directly to the LAPIC.
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#[derive(Copy, Clone, Debug, Default)]
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pub struct MsiIrqSourceConfig {
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/// High address to delivery message signaled interrupt.
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pub high_addr: u32,
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/// Low address to delivery message signaled interrupt.
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pub low_addr: u32,
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/// Data to write to delivery message signaled interrupt.
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pub data: u32,
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/// Unique ID of the device to delivery message signaled interrupt.
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pub devid: u32,
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}
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/// Configuration data for an interrupt source.
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#[derive(Copy, Clone, Debug)]
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pub enum InterruptSourceConfig {
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/// Configuration data for Legacy interrupts.
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LegacyIrq(LegacyIrqSourceConfig),
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/// Configuration data for PciMsi, PciMsix and generic MSI interrupts.
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MsiIrq(MsiIrqSourceConfig),
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}
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///
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/// Trait to represent a Vm
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///
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/// This crate provides a hypervisor-agnostic interfaces for Vm
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///
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pub trait Vm: Send + Sync {
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#[cfg(target_arch = "x86_64")]
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/// Sets the address of the one-page region in the VM's address space.
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fn set_identity_map_address(&self, address: u64) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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/// Sets the address of the three-page region in the VM's address space.
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fn set_tss_address(&self, offset: usize) -> Result<()>;
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/// Creates an in-kernel interrupt controller.
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fn create_irq_chip(&self) -> Result<()>;
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/// Registers an event that will, when signaled, trigger the `gsi` IRQ.
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fn register_irqfd(&self, fd: &EventFd, gsi: u32) -> Result<()>;
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/// Unregister an event that will, when signaled, trigger the `gsi` IRQ.
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fn unregister_irqfd(&self, fd: &EventFd, gsi: u32) -> Result<()>;
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/// Creates a new KVM vCPU file descriptor and maps the memory corresponding
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fn create_vcpu(&self, id: u8, vm_ops: Option<Arc<dyn VmOps>>) -> Result<Arc<dyn Vcpu>>;
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#[cfg(target_arch = "aarch64")]
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fn create_vgic(
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&self,
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vcpu_count: u64,
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dist_addr: u64,
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dist_size: u64,
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redist_size: u64,
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msi_size: u64,
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nr_irqs: u32,
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) -> Result<Box<dyn Vgic>>;
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/// Registers an event to be signaled whenever a certain address is written to.
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fn register_ioevent(
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&self,
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fd: &EventFd,
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addr: &IoEventAddress,
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datamatch: Option<DataMatch>,
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) -> Result<()>;
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/// Unregister an event from a certain address it has been previously registered to.
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fn unregister_ioevent(&self, fd: &EventFd, addr: &IoEventAddress) -> Result<()>;
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// Construct a routing entry
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fn make_routing_entry(&self, gsi: u32, config: &InterruptSourceConfig) -> IrqRoutingEntry;
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/// Sets the GSI routing table entries, overwriting any previously set
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fn set_gsi_routing(&self, entries: &[IrqRoutingEntry]) -> Result<()>;
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/// Creates a memory region structure that can be used with {create/remove}_user_memory_region
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fn make_user_memory_region(
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&self,
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slot: u32,
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guest_phys_addr: u64,
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memory_size: u64,
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userspace_addr: u64,
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readonly: bool,
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log_dirty_pages: bool,
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) -> MemoryRegion;
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/// Creates a guest physical memory slot.
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fn create_user_memory_region(&self, user_memory_region: MemoryRegion) -> Result<()>;
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/// Removes a guest physical memory slot.
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fn remove_user_memory_region(&self, user_memory_region: MemoryRegion) -> Result<()>;
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/// Creates an emulated device in the kernel.
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fn create_device(&self, device: &mut CreateDevice) -> Result<Arc<dyn Device>>;
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/// Returns the preferred CPU target type which can be emulated by KVM on underlying host.
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#[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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fn get_preferred_target(&self, kvi: &mut VcpuInit) -> Result<()>;
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/// Enable split Irq capability
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#[cfg(target_arch = "x86_64")]
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fn enable_split_irq(&self) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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fn enable_sgx_attribute(&self, file: File) -> Result<()>;
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/// Retrieve guest clock.
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#[cfg(all(feature = "kvm", target_arch = "x86_64"))]
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fn get_clock(&self) -> Result<ClockData>;
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/// Set guest clock.
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#[cfg(all(feature = "kvm", target_arch = "x86_64"))]
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fn set_clock(&self, data: &ClockData) -> Result<()>;
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#[cfg(feature = "kvm")]
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/// Checks if a particular `Cap` is available.
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fn check_extension(&self, c: Cap) -> bool;
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/// Create a device that is used for passthrough
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fn create_passthrough_device(&self) -> Result<Arc<dyn Device>>;
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/// Get the Vm state. Return VM specific data
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fn state(&self) -> Result<VmState>;
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/// Set the VM state
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fn set_state(&self, state: VmState) -> Result<()>;
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/// Start logging dirty pages
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fn start_dirty_log(&self) -> Result<()>;
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/// Stop logging dirty pages
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fn stop_dirty_log(&self) -> Result<()>;
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/// Get dirty pages bitmap
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fn get_dirty_log(&self, slot: u32, base_gpa: u64, memory_size: u64) -> Result<Vec<u64>>;
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#[cfg(feature = "tdx")]
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/// Initalize TDX on this VM
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fn tdx_init(&self, cpuid: &CpuId, max_vcpus: u32) -> Result<()>;
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#[cfg(feature = "tdx")]
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/// Finalize the configuration of TDX on this VM
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fn tdx_finalize(&self) -> Result<()>;
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#[cfg(feature = "tdx")]
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/// Initalize a TDX memory region for this VM
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fn tdx_init_memory_region(
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&self,
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host_address: u64,
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guest_address: u64,
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size: u64,
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measure: bool,
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) -> Result<()>;
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}
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pub trait VmOps: Send + Sync {
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fn guest_mem_write(&self, gpa: u64, buf: &[u8]) -> Result<usize>;
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fn guest_mem_read(&self, gpa: u64, buf: &mut [u8]) -> Result<usize>;
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fn mmio_read(&self, gpa: u64, data: &mut [u8]) -> Result<()>;
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fn mmio_write(&self, gpa: u64, data: &[u8]) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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fn pio_read(&self, port: u64, data: &mut [u8]) -> Result<()>;
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#[cfg(target_arch = "x86_64")]
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fn pio_write(&self, port: u64, data: &[u8]) -> Result<()>;
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}
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