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4b08142117
This isn't supported by clippy on Rust 1.60 but also no longer seems to be required. Signed-off-by: Rob Bradford <robert.bradford@intel.com>
61 lines
1.3 KiB
Rust
61 lines
1.3 KiB
Rust
// Copyright © 2020 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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use serde::{Deserialize, Serialize};
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mod bus;
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pub mod dma_mapping;
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pub mod interrupt;
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pub use self::bus::{Bus, BusDevice, Error as BusError};
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/// Type of Message Signalled Interrupt
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#[derive(Copy, Clone, Debug, PartialEq, Eq, Serialize, Deserialize)]
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pub enum MsiIrqType {
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/// PCI MSI IRQ numbers.
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PciMsi,
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/// PCI MSIx IRQ numbers.
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PciMsix,
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/// Generic MSI IRQ numbers.
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GenericMsi,
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}
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#[derive(Copy, Clone, PartialEq, Eq, Serialize, Deserialize, Debug)]
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pub enum PciBarType {
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Io,
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Mmio32,
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Mmio64,
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}
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/// Enumeration for device resources.
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#[allow(missing_docs)]
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#[derive(Clone, Debug, Serialize, Deserialize)]
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pub enum Resource {
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/// IO Port address range.
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PioAddressRange { base: u16, size: u16 },
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/// Memory Mapped IO address range.
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MmioAddressRange { base: u64, size: u64 },
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/// PCI BAR
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PciBar {
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index: usize,
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base: u64,
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size: u64,
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type_: PciBarType,
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prefetchable: bool,
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},
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/// Legacy IRQ number.
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LegacyIrq(u32),
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/// Message Signaled Interrupt
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MsiIrq {
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ty: MsiIrqType,
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base: u32,
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size: u32,
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},
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/// Network Interface Card MAC address.
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MacAddress(String),
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/// KVM memslot index.
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KvmMemSlot(u32),
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}
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