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With the new beta version, clippy complains about redundant allocation when using Arc<Box<dyn T>>, and suggests replacing it simply with Arc<dyn T>. Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
1181 lines
41 KiB
Rust
1181 lines
41 KiB
Rust
// Copyright 2018 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE-BSD-3-Clause file.
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//
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// Copyright © 2019 Intel Corporation
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//
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// SPDX-License-Identifier: Apache-2.0 AND BSD-3-Clause
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use super::VirtioPciCommonConfig;
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use crate::transport::VirtioTransport;
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use crate::GuestMemoryMmap;
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use crate::{
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ActivateResult, Queue, VirtioDevice, VirtioDeviceType, VirtioInterrupt, VirtioInterruptType,
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DEVICE_ACKNOWLEDGE, DEVICE_DRIVER, DEVICE_DRIVER_OK, DEVICE_FAILED, DEVICE_FEATURES_OK,
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DEVICE_INIT,
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};
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use anyhow::anyhow;
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use libc::EFD_NONBLOCK;
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use pci::{
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BarReprogrammingParams, MsixCap, MsixConfig, PciBarConfiguration, PciBarRegionType,
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PciCapability, PciCapabilityId, PciClassCode, PciConfiguration, PciDevice, PciDeviceError,
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PciHeaderType, PciMassStorageSubclass, PciNetworkControllerSubclass, PciSubclass,
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};
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use std::any::Any;
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use std::cmp;
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use std::io::Write;
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use std::num::Wrapping;
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use std::result;
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use std::sync::atomic::{AtomicBool, AtomicU16, AtomicUsize, Ordering};
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use std::sync::{Arc, Barrier, Mutex};
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use versionize::{VersionMap, Versionize, VersionizeResult};
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use versionize_derive::Versionize;
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use vm_allocator::SystemAllocator;
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use vm_device::interrupt::{
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InterruptIndex, InterruptManager, InterruptSourceGroup, MsiIrqGroupConfig,
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};
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use vm_device::BusDevice;
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use vm_memory::{
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Address, ByteValued, GuestAddress, GuestAddressSpace, GuestMemoryAtomic, GuestUsize, Le32,
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};
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use vm_migration::{
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Migratable, MigratableError, Pausable, Snapshot, Snapshottable, Transportable, VersionMapped,
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};
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use vm_virtio::{queue, VirtioIommuRemapping, VIRTIO_MSI_NO_VECTOR};
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use vmm_sys_util::{errno::Result, eventfd::EventFd};
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#[derive(Debug)]
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enum Error {
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/// Failed to retrieve queue ring's index.
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QueueRingIndex(queue::Error),
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}
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#[allow(clippy::enum_variant_names)]
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enum PciCapabilityType {
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CommonConfig = 1,
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NotifyConfig = 2,
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IsrConfig = 3,
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DeviceConfig = 4,
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PciConfig = 5,
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SharedMemoryConfig = 8,
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}
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// This offset represents the 2 bytes omitted from the VirtioPciCap structure
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// as they are already handled through add_capability(). These 2 bytes are the
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// fields cap_vndr (1 byte) and cap_next (1 byte) defined in the virtio spec.
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const VIRTIO_PCI_CAP_OFFSET: usize = 2;
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#[allow(dead_code)]
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#[repr(packed)]
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#[derive(Clone, Copy, Default)]
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struct VirtioPciCap {
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cap_len: u8, // Generic PCI field: capability length
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cfg_type: u8, // Identifies the structure.
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pci_bar: u8, // Where to find it.
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id: u8, // Multiple capabilities of the same type
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padding: [u8; 2], // Pad to full dword.
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offset: Le32, // Offset within bar.
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length: Le32, // Length of the structure, in bytes.
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}
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// It is safe to implement ByteValued. All members are simple numbers and any value is valid.
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unsafe impl ByteValued for VirtioPciCap {}
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impl PciCapability for VirtioPciCap {
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fn bytes(&self) -> &[u8] {
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self.as_slice()
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}
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fn id(&self) -> PciCapabilityId {
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PciCapabilityId::VendorSpecific
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}
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}
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const VIRTIO_PCI_CAP_LEN_OFFSET: u8 = 2;
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impl VirtioPciCap {
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pub fn new(cfg_type: PciCapabilityType, pci_bar: u8, offset: u32, length: u32) -> Self {
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VirtioPciCap {
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cap_len: (std::mem::size_of::<VirtioPciCap>() as u8) + VIRTIO_PCI_CAP_LEN_OFFSET,
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cfg_type: cfg_type as u8,
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pci_bar,
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id: 0,
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padding: [0; 2],
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offset: Le32::from(offset),
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length: Le32::from(length),
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}
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}
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}
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#[allow(dead_code)]
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#[repr(packed)]
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#[derive(Clone, Copy, Default)]
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struct VirtioPciNotifyCap {
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cap: VirtioPciCap,
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notify_off_multiplier: Le32,
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}
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// It is safe to implement ByteValued. All members are simple numbers and any value is valid.
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unsafe impl ByteValued for VirtioPciNotifyCap {}
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impl PciCapability for VirtioPciNotifyCap {
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fn bytes(&self) -> &[u8] {
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self.as_slice()
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}
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fn id(&self) -> PciCapabilityId {
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PciCapabilityId::VendorSpecific
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}
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}
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impl VirtioPciNotifyCap {
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pub fn new(
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cfg_type: PciCapabilityType,
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pci_bar: u8,
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offset: u32,
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length: u32,
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multiplier: Le32,
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) -> Self {
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VirtioPciNotifyCap {
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cap: VirtioPciCap {
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cap_len: (std::mem::size_of::<VirtioPciNotifyCap>() as u8)
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+ VIRTIO_PCI_CAP_LEN_OFFSET,
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cfg_type: cfg_type as u8,
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pci_bar,
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id: 0,
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padding: [0; 2],
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offset: Le32::from(offset),
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length: Le32::from(length),
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},
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notify_off_multiplier: multiplier,
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}
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}
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}
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#[allow(dead_code)]
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#[repr(packed)]
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#[derive(Clone, Copy, Default)]
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struct VirtioPciCap64 {
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cap: VirtioPciCap,
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offset_hi: Le32,
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length_hi: Le32,
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}
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// It is safe to implement ByteValued. All members are simple numbers and any value is valid.
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unsafe impl ByteValued for VirtioPciCap64 {}
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impl PciCapability for VirtioPciCap64 {
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fn bytes(&self) -> &[u8] {
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self.as_slice()
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}
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fn id(&self) -> PciCapabilityId {
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PciCapabilityId::VendorSpecific
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}
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}
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impl VirtioPciCap64 {
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pub fn new(cfg_type: PciCapabilityType, pci_bar: u8, id: u8, offset: u64, length: u64) -> Self {
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VirtioPciCap64 {
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cap: VirtioPciCap {
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cap_len: (std::mem::size_of::<VirtioPciCap64>() as u8) + VIRTIO_PCI_CAP_LEN_OFFSET,
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cfg_type: cfg_type as u8,
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pci_bar,
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id,
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padding: [0; 2],
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offset: Le32::from(offset as u32),
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length: Le32::from(length as u32),
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},
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offset_hi: Le32::from((offset >> 32) as u32),
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length_hi: Le32::from((length >> 32) as u32),
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}
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}
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}
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#[allow(dead_code)]
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#[repr(packed)]
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#[derive(Clone, Copy, Default)]
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struct VirtioPciCfgCap {
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cap: VirtioPciCap,
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pci_cfg_data: [u8; 4],
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}
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// It is safe to implement ByteValued. All members are simple numbers and any value is valid.
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unsafe impl ByteValued for VirtioPciCfgCap {}
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impl PciCapability for VirtioPciCfgCap {
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fn bytes(&self) -> &[u8] {
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self.as_slice()
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}
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fn id(&self) -> PciCapabilityId {
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PciCapabilityId::VendorSpecific
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}
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}
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impl VirtioPciCfgCap {
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fn new() -> Self {
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VirtioPciCfgCap {
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cap: VirtioPciCap::new(PciCapabilityType::PciConfig, 0, 0, 0),
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..Default::default()
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}
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}
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}
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#[derive(Clone, Copy, Default)]
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struct VirtioPciCfgCapInfo {
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offset: usize,
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cap: VirtioPciCfgCap,
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}
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#[allow(dead_code)]
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#[derive(Copy, Clone)]
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pub enum PciVirtioSubclass {
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NonTransitionalBase = 0xff,
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}
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impl PciSubclass for PciVirtioSubclass {
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fn get_register_value(&self) -> u8 {
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*self as u8
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}
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}
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// Allocate one bar for the structs pointed to by the capability structures.
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// As per the PCI specification, because the same BAR shares MSI-X and non
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// MSI-X structures, it is recommended to use 8KiB alignment for all those
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// structures.
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const COMMON_CONFIG_BAR_OFFSET: u64 = 0x0000;
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const COMMON_CONFIG_SIZE: u64 = 56;
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const ISR_CONFIG_BAR_OFFSET: u64 = 0x2000;
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const ISR_CONFIG_SIZE: u64 = 1;
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const DEVICE_CONFIG_BAR_OFFSET: u64 = 0x4000;
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const DEVICE_CONFIG_SIZE: u64 = 0x1000;
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const NOTIFICATION_BAR_OFFSET: u64 = 0x6000;
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const NOTIFICATION_SIZE: u64 = 0x1000;
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const MSIX_TABLE_BAR_OFFSET: u64 = 0x8000;
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// The size is 256KiB because the table can hold up to 2048 entries, with each
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// entry being 128 bits (4 DWORDS).
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const MSIX_TABLE_SIZE: u64 = 0x40000;
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const MSIX_PBA_BAR_OFFSET: u64 = 0x48000;
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// The size is 2KiB because the Pending Bit Array has one bit per vector and it
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// can support up to 2048 vectors.
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const MSIX_PBA_SIZE: u64 = 0x800;
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// The BAR size must be a power of 2.
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const CAPABILITY_BAR_SIZE: u64 = 0x80000;
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const NOTIFY_OFF_MULTIPLIER: u32 = 4; // A dword per notification address.
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const VIRTIO_PCI_VENDOR_ID: u16 = 0x1af4;
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const VIRTIO_PCI_DEVICE_ID_BASE: u16 = 0x1040; // Add to device type to get device ID.
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#[derive(Versionize)]
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struct QueueState {
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max_size: u16,
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size: u16,
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ready: bool,
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vector: u16,
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desc_table: u64,
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avail_ring: u64,
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used_ring: u64,
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}
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#[derive(Versionize)]
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struct VirtioPciDeviceState {
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device_activated: bool,
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queues: Vec<QueueState>,
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interrupt_status: usize,
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}
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impl VersionMapped for VirtioPciDeviceState {}
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pub struct VirtioPciDevice {
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id: String,
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// PCI configuration registers.
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configuration: PciConfiguration,
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// virtio PCI common configuration
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common_config: VirtioPciCommonConfig,
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// MSI-X config
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msix_config: Option<Arc<Mutex<MsixConfig>>>,
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// Number of MSI-X vectors
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msix_num: u16,
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// Virtio device reference and status
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device: Arc<Mutex<dyn VirtioDevice>>,
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device_activated: Arc<AtomicBool>,
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// PCI interrupts.
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interrupt_status: Arc<AtomicUsize>,
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virtio_interrupt: Option<Arc<dyn VirtioInterrupt>>,
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interrupt_source_group: Arc<dyn InterruptSourceGroup>,
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// virtio queues
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queues: Vec<Queue>,
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queue_evts: Vec<EventFd>,
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// Guest memory
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memory: Option<GuestMemoryAtomic<GuestMemoryMmap>>,
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// Settings PCI BAR
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settings_bar: u8,
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settings_bar_addr: Option<GuestAddress>,
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// Whether to use 64-bit bar location or 32-bit
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use_64bit_bar: bool,
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// Add a dedicated structure to hold information about the very specific
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// virtio-pci capability VIRTIO_PCI_CAP_PCI_CFG. This is needed to support
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// the legacy/backward compatible mechanism of letting the guest access the
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// other virtio capabilities without mapping the PCI BARs. This can be
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// needed when the guest tries to early access the virtio configuration of
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// a device.
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cap_pci_cfg_info: VirtioPciCfgCapInfo,
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// Details of bar regions to free
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bar_regions: Vec<(GuestAddress, GuestUsize, PciBarRegionType)>,
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// EventFd to signal on to request activation
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activate_evt: EventFd,
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// Barrier that is used to wait on for activation
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activate_barrier: Arc<Barrier>,
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}
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impl VirtioPciDevice {
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/// Constructs a new PCI transport for the given virtio device.
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#[allow(clippy::too_many_arguments)]
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pub fn new(
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id: String,
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memory: GuestMemoryAtomic<GuestMemoryMmap>,
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device: Arc<Mutex<dyn VirtioDevice>>,
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msix_num: u16,
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iommu_mapping_cb: Option<Arc<VirtioIommuRemapping>>,
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interrupt_manager: &Arc<dyn InterruptManager<GroupConfig = MsiIrqGroupConfig>>,
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pci_device_bdf: u32,
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activate_evt: EventFd,
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) -> Result<Self> {
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let device_clone = device.clone();
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let locked_device = device_clone.lock().unwrap();
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let mut queue_evts = Vec::new();
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for _ in locked_device.queue_max_sizes().iter() {
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queue_evts.push(EventFd::new(EFD_NONBLOCK)?)
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}
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let queues = locked_device
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.queue_max_sizes()
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.iter()
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.map(|&s| {
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let mut queue = Queue::new(s);
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queue.iommu_mapping_cb = iommu_mapping_cb.clone();
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queue
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})
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.collect();
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let pci_device_id = VIRTIO_PCI_DEVICE_ID_BASE + locked_device.device_type() as u16;
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let interrupt_source_group = interrupt_manager.create_group(MsiIrqGroupConfig {
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base: 0,
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count: msix_num as InterruptIndex,
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})?;
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let (msix_config, msix_config_clone) = if msix_num > 0 {
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let msix_config = Arc::new(Mutex::new(MsixConfig::new(
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msix_num,
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interrupt_source_group.clone(),
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pci_device_bdf,
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)));
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let msix_config_clone = msix_config.clone();
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(Some(msix_config), Some(msix_config_clone))
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} else {
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(None, None)
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};
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// All device types *except* virtio block devices should be allocated a 64-bit bar
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// The block devices should be given a 32-bit BAR so that they are easily accessible
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// to firmware without requiring excessive identity mapping.
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let mut use_64bit_bar = true;
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let (class, subclass) = match VirtioDeviceType::from(locked_device.device_type()) {
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VirtioDeviceType::Net => (
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PciClassCode::NetworkController,
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&PciNetworkControllerSubclass::EthernetController as &dyn PciSubclass,
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),
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VirtioDeviceType::Block => {
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use_64bit_bar = false;
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(
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PciClassCode::MassStorage,
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&PciMassStorageSubclass::MassStorage as &dyn PciSubclass,
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)
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}
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_ => (
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PciClassCode::Other,
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&PciVirtioSubclass::NonTransitionalBase as &dyn PciSubclass,
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),
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};
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let configuration = PciConfiguration::new(
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VIRTIO_PCI_VENDOR_ID,
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pci_device_id,
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0x1, // For modern virtio-PCI devices
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class,
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subclass,
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None,
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PciHeaderType::Device,
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VIRTIO_PCI_VENDOR_ID,
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pci_device_id,
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msix_config_clone,
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);
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let mut virtio_pci_device = VirtioPciDevice {
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id,
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configuration,
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common_config: VirtioPciCommonConfig {
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driver_status: 0,
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config_generation: 0,
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device_feature_select: 0,
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driver_feature_select: 0,
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queue_select: 0,
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msix_config: Arc::new(AtomicU16::new(VIRTIO_MSI_NO_VECTOR)),
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},
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msix_config,
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msix_num,
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device,
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device_activated: Arc::new(AtomicBool::new(false)),
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interrupt_status: Arc::new(AtomicUsize::new(0)),
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virtio_interrupt: None,
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queues,
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queue_evts,
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memory: Some(memory),
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settings_bar: 0,
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settings_bar_addr: None,
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use_64bit_bar,
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interrupt_source_group,
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cap_pci_cfg_info: VirtioPciCfgCapInfo::default(),
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bar_regions: vec![],
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activate_evt,
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activate_barrier: Arc::new(Barrier::new(2)),
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};
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if let Some(msix_config) = &virtio_pci_device.msix_config {
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virtio_pci_device.virtio_interrupt = Some(Arc::new(VirtioInterruptMsix::new(
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msix_config.clone(),
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virtio_pci_device.common_config.msix_config.clone(),
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virtio_pci_device.interrupt_source_group.clone(),
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)));
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}
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Ok(virtio_pci_device)
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}
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fn state(&self) -> VirtioPciDeviceState {
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VirtioPciDeviceState {
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device_activated: self.device_activated.load(Ordering::Acquire),
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interrupt_status: self.interrupt_status.load(Ordering::Acquire),
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queues: self
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.queues
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.iter()
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.map(|q| QueueState {
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max_size: q.max_size,
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size: q.size,
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ready: q.ready,
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vector: q.vector,
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desc_table: q.desc_table.0,
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avail_ring: q.avail_ring.0,
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used_ring: q.used_ring.0,
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})
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.collect(),
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}
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}
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fn set_state(&mut self, state: &VirtioPciDeviceState) -> std::result::Result<(), Error> {
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self.device_activated
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.store(state.device_activated, Ordering::Release);
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self.interrupt_status
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.store(state.interrupt_status, Ordering::Release);
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// Update virtqueues indexes for both available and used rings.
|
|
if let Some(mem) = self.memory.as_ref() {
|
|
let mem = mem.memory();
|
|
for (i, queue) in self.queues.iter_mut().enumerate() {
|
|
queue.max_size = state.queues[i].max_size;
|
|
queue.size = state.queues[i].size;
|
|
queue.ready = state.queues[i].ready;
|
|
queue.vector = state.queues[i].vector;
|
|
queue.desc_table = GuestAddress(state.queues[i].desc_table);
|
|
queue.avail_ring = GuestAddress(state.queues[i].avail_ring);
|
|
queue.used_ring = GuestAddress(state.queues[i].used_ring);
|
|
queue.next_avail = Wrapping(
|
|
queue
|
|
.used_index_from_memory(&mem)
|
|
.map_err(Error::QueueRingIndex)?,
|
|
);
|
|
queue.next_used = Wrapping(
|
|
queue
|
|
.used_index_from_memory(&mem)
|
|
.map_err(Error::QueueRingIndex)?,
|
|
);
|
|
}
|
|
}
|
|
|
|
Ok(())
|
|
}
|
|
|
|
/// Gets the list of queue events that must be triggered whenever the VM writes to
|
|
/// `virtio::NOTIFY_REG_OFFSET` past the MMIO base. Each event must be triggered when the
|
|
/// value being written equals the index of the event in this list.
|
|
fn queue_evts(&self) -> &[EventFd] {
|
|
self.queue_evts.as_slice()
|
|
}
|
|
|
|
fn is_driver_ready(&self) -> bool {
|
|
let ready_bits =
|
|
(DEVICE_ACKNOWLEDGE | DEVICE_DRIVER | DEVICE_DRIVER_OK | DEVICE_FEATURES_OK) as u8;
|
|
self.common_config.driver_status == ready_bits
|
|
&& self.common_config.driver_status & DEVICE_FAILED as u8 == 0
|
|
}
|
|
|
|
/// Determines if the driver has requested the device (re)init / reset itself
|
|
fn is_driver_init(&self) -> bool {
|
|
self.common_config.driver_status == DEVICE_INIT as u8
|
|
}
|
|
|
|
// This function is used by the caller to provide the expected base address
|
|
// for the virtio-pci configuration BAR.
|
|
pub fn set_config_bar_addr(&mut self, bar_addr: u64) {
|
|
self.settings_bar_addr = Some(GuestAddress(bar_addr));
|
|
}
|
|
|
|
pub fn config_bar_addr(&self) -> u64 {
|
|
self.configuration.get_bar_addr(self.settings_bar as usize)
|
|
}
|
|
|
|
fn add_pci_capabilities(
|
|
&mut self,
|
|
settings_bar: u8,
|
|
) -> std::result::Result<(), PciDeviceError> {
|
|
// Add pointers to the different configuration structures from the PCI capabilities.
|
|
let common_cap = VirtioPciCap::new(
|
|
PciCapabilityType::CommonConfig,
|
|
settings_bar,
|
|
COMMON_CONFIG_BAR_OFFSET as u32,
|
|
COMMON_CONFIG_SIZE as u32,
|
|
);
|
|
self.configuration
|
|
.add_capability(&common_cap)
|
|
.map_err(PciDeviceError::CapabilitiesSetup)?;
|
|
|
|
let isr_cap = VirtioPciCap::new(
|
|
PciCapabilityType::IsrConfig,
|
|
settings_bar,
|
|
ISR_CONFIG_BAR_OFFSET as u32,
|
|
ISR_CONFIG_SIZE as u32,
|
|
);
|
|
self.configuration
|
|
.add_capability(&isr_cap)
|
|
.map_err(PciDeviceError::CapabilitiesSetup)?;
|
|
|
|
// TODO(dgreid) - set based on device's configuration size?
|
|
let device_cap = VirtioPciCap::new(
|
|
PciCapabilityType::DeviceConfig,
|
|
settings_bar,
|
|
DEVICE_CONFIG_BAR_OFFSET as u32,
|
|
DEVICE_CONFIG_SIZE as u32,
|
|
);
|
|
self.configuration
|
|
.add_capability(&device_cap)
|
|
.map_err(PciDeviceError::CapabilitiesSetup)?;
|
|
|
|
let notify_cap = VirtioPciNotifyCap::new(
|
|
PciCapabilityType::NotifyConfig,
|
|
settings_bar,
|
|
NOTIFICATION_BAR_OFFSET as u32,
|
|
NOTIFICATION_SIZE as u32,
|
|
Le32::from(NOTIFY_OFF_MULTIPLIER),
|
|
);
|
|
self.configuration
|
|
.add_capability(¬ify_cap)
|
|
.map_err(PciDeviceError::CapabilitiesSetup)?;
|
|
|
|
let configuration_cap = VirtioPciCfgCap::new();
|
|
self.cap_pci_cfg_info.offset = self
|
|
.configuration
|
|
.add_capability(&configuration_cap)
|
|
.map_err(PciDeviceError::CapabilitiesSetup)?
|
|
+ VIRTIO_PCI_CAP_OFFSET;
|
|
self.cap_pci_cfg_info.cap = configuration_cap;
|
|
|
|
if self.msix_config.is_some() {
|
|
let msix_cap = MsixCap::new(
|
|
settings_bar,
|
|
self.msix_num,
|
|
MSIX_TABLE_BAR_OFFSET as u32,
|
|
settings_bar,
|
|
MSIX_PBA_BAR_OFFSET as u32,
|
|
);
|
|
self.configuration
|
|
.add_capability(&msix_cap)
|
|
.map_err(PciDeviceError::CapabilitiesSetup)?;
|
|
}
|
|
|
|
self.settings_bar = settings_bar;
|
|
Ok(())
|
|
}
|
|
|
|
fn read_cap_pci_cfg(&mut self, offset: usize, mut data: &mut [u8]) {
|
|
let cap_slice = self.cap_pci_cfg_info.cap.as_slice();
|
|
let data_len = data.len();
|
|
let cap_len = cap_slice.len();
|
|
if offset + data_len > cap_len {
|
|
error!("Failed to read cap_pci_cfg from config space");
|
|
return;
|
|
}
|
|
|
|
if offset < std::mem::size_of::<VirtioPciCap>() {
|
|
if let Some(end) = offset.checked_add(data_len) {
|
|
// This write can't fail, offset and end are checked against config_len.
|
|
data.write_all(&cap_slice[offset..cmp::min(end, cap_len)])
|
|
.unwrap();
|
|
}
|
|
} else {
|
|
// Safe since we know self.cap_pci_cfg_info.cap.cap.offset is 32bits long.
|
|
let bar_offset: u32 =
|
|
unsafe { std::mem::transmute(self.cap_pci_cfg_info.cap.cap.offset) };
|
|
self.read_bar(0, bar_offset as u64, data)
|
|
}
|
|
}
|
|
|
|
fn write_cap_pci_cfg(&mut self, offset: usize, data: &[u8]) -> Option<Arc<Barrier>> {
|
|
let cap_slice = self.cap_pci_cfg_info.cap.as_mut_slice();
|
|
let data_len = data.len();
|
|
let cap_len = cap_slice.len();
|
|
if offset + data_len > cap_len {
|
|
error!("Failed to write cap_pci_cfg to config space");
|
|
return None;
|
|
}
|
|
|
|
if offset < std::mem::size_of::<VirtioPciCap>() {
|
|
let (_, right) = cap_slice.split_at_mut(offset);
|
|
right[..data_len].copy_from_slice(data);
|
|
None
|
|
} else {
|
|
// Safe since we know self.cap_pci_cfg_info.cap.cap.offset is 32bits long.
|
|
let bar_offset: u32 =
|
|
unsafe { std::mem::transmute(self.cap_pci_cfg_info.cap.cap.offset) };
|
|
self.write_bar(0, bar_offset as u64, data)
|
|
}
|
|
}
|
|
|
|
pub fn virtio_device(&self) -> Arc<Mutex<dyn VirtioDevice>> {
|
|
self.device.clone()
|
|
}
|
|
|
|
fn activate(&mut self) -> ActivateResult {
|
|
if let Some(virtio_interrupt) = self.virtio_interrupt.take() {
|
|
if self.memory.is_some() {
|
|
let mem = self.memory.as_ref().unwrap().clone();
|
|
let mut device = self.device.lock().unwrap();
|
|
let mut queue_evts = Vec::new();
|
|
let mut queues = self.queues.clone();
|
|
queues.retain(|q| q.ready);
|
|
for (i, queue) in queues.iter().enumerate() {
|
|
queue_evts.push(self.queue_evts[i].try_clone().unwrap());
|
|
if !queue.is_valid(&mem.memory()) {
|
|
error!("Queue {} is not valid", i);
|
|
}
|
|
}
|
|
return device.activate(mem, virtio_interrupt, queues, queue_evts);
|
|
}
|
|
}
|
|
Ok(())
|
|
}
|
|
|
|
pub fn maybe_activate(&mut self) {
|
|
if self.needs_activation() {
|
|
self.activate().expect("Failed to activate device");
|
|
self.device_activated.store(true, Ordering::SeqCst);
|
|
info!("{}: Waiting for barrier", self.id);
|
|
self.activate_barrier.wait();
|
|
info!("{}: Barrier released", self.id);
|
|
} else {
|
|
info!("{}: Device does not need activation", self.id)
|
|
}
|
|
}
|
|
|
|
fn needs_activation(&self) -> bool {
|
|
!self.device_activated.load(Ordering::SeqCst) && self.is_driver_ready()
|
|
}
|
|
}
|
|
|
|
impl VirtioTransport for VirtioPciDevice {
|
|
fn ioeventfds(&self, base_addr: u64) -> Vec<(&EventFd, u64)> {
|
|
let notify_base = base_addr + NOTIFICATION_BAR_OFFSET;
|
|
self.queue_evts()
|
|
.iter()
|
|
.enumerate()
|
|
.map(|(i, event)| {
|
|
(
|
|
event,
|
|
notify_base + i as u64 * u64::from(NOTIFY_OFF_MULTIPLIER),
|
|
)
|
|
})
|
|
.collect()
|
|
}
|
|
}
|
|
|
|
pub struct VirtioInterruptMsix {
|
|
msix_config: Arc<Mutex<MsixConfig>>,
|
|
config_vector: Arc<AtomicU16>,
|
|
interrupt_source_group: Arc<dyn InterruptSourceGroup>,
|
|
}
|
|
|
|
impl VirtioInterruptMsix {
|
|
pub fn new(
|
|
msix_config: Arc<Mutex<MsixConfig>>,
|
|
config_vector: Arc<AtomicU16>,
|
|
interrupt_source_group: Arc<dyn InterruptSourceGroup>,
|
|
) -> Self {
|
|
VirtioInterruptMsix {
|
|
msix_config,
|
|
config_vector,
|
|
interrupt_source_group,
|
|
}
|
|
}
|
|
}
|
|
|
|
impl VirtioInterrupt for VirtioInterruptMsix {
|
|
fn trigger(
|
|
&self,
|
|
int_type: &VirtioInterruptType,
|
|
queue: Option<&Queue>,
|
|
) -> std::result::Result<(), std::io::Error> {
|
|
let vector = match int_type {
|
|
VirtioInterruptType::Config => self.config_vector.load(Ordering::Acquire),
|
|
VirtioInterruptType::Queue => {
|
|
if let Some(q) = queue {
|
|
q.vector
|
|
} else {
|
|
0
|
|
}
|
|
}
|
|
};
|
|
|
|
if vector == VIRTIO_MSI_NO_VECTOR {
|
|
return Ok(());
|
|
}
|
|
|
|
let config = &mut self.msix_config.lock().unwrap();
|
|
let entry = &config.table_entries[vector as usize];
|
|
// In case the vector control register associated with the entry
|
|
// has its first bit set, this means the vector is masked and the
|
|
// device should not inject the interrupt.
|
|
// Instead, the Pending Bit Array table is updated to reflect there
|
|
// is a pending interrupt for this specific vector.
|
|
if config.masked() || entry.masked() {
|
|
config.set_pba_bit(vector, false);
|
|
return Ok(());
|
|
}
|
|
|
|
self.interrupt_source_group
|
|
.trigger(vector as InterruptIndex)
|
|
}
|
|
|
|
fn notifier(&self, int_type: &VirtioInterruptType, queue: Option<&Queue>) -> Option<EventFd> {
|
|
let vector = match int_type {
|
|
VirtioInterruptType::Config => self.config_vector.load(Ordering::Acquire),
|
|
VirtioInterruptType::Queue => {
|
|
if let Some(q) = queue {
|
|
q.vector
|
|
} else {
|
|
0
|
|
}
|
|
}
|
|
};
|
|
|
|
self.interrupt_source_group
|
|
.notifier(vector as InterruptIndex)
|
|
}
|
|
}
|
|
|
|
impl PciDevice for VirtioPciDevice {
|
|
fn write_config_register(
|
|
&mut self,
|
|
reg_idx: usize,
|
|
offset: u64,
|
|
data: &[u8],
|
|
) -> Option<Arc<Barrier>> {
|
|
// Handle the special case where the capability VIRTIO_PCI_CAP_PCI_CFG
|
|
// is accessed. This capability has a special meaning as it allows the
|
|
// guest to access other capabilities without mapping the PCI BAR.
|
|
let base = reg_idx * 4;
|
|
if base + offset as usize >= self.cap_pci_cfg_info.offset
|
|
&& base + offset as usize + data.len()
|
|
<= self.cap_pci_cfg_info.offset + self.cap_pci_cfg_info.cap.bytes().len()
|
|
{
|
|
let offset = base + offset as usize - self.cap_pci_cfg_info.offset;
|
|
self.write_cap_pci_cfg(offset, data)
|
|
} else {
|
|
self.configuration
|
|
.write_config_register(reg_idx, offset, data);
|
|
None
|
|
}
|
|
}
|
|
|
|
fn read_config_register(&mut self, reg_idx: usize) -> u32 {
|
|
// Handle the special case where the capability VIRTIO_PCI_CAP_PCI_CFG
|
|
// is accessed. This capability has a special meaning as it allows the
|
|
// guest to access other capabilities without mapping the PCI BAR.
|
|
let base = reg_idx * 4;
|
|
if base >= self.cap_pci_cfg_info.offset
|
|
&& base + 4 <= self.cap_pci_cfg_info.offset + self.cap_pci_cfg_info.cap.bytes().len()
|
|
{
|
|
let offset = base - self.cap_pci_cfg_info.offset;
|
|
let mut data = [0u8; 4];
|
|
self.read_cap_pci_cfg(offset, &mut data);
|
|
u32::from_le_bytes(data)
|
|
} else {
|
|
self.configuration.read_reg(reg_idx)
|
|
}
|
|
}
|
|
|
|
fn detect_bar_reprogramming(
|
|
&mut self,
|
|
reg_idx: usize,
|
|
data: &[u8],
|
|
) -> Option<BarReprogrammingParams> {
|
|
self.configuration.detect_bar_reprogramming(reg_idx, data)
|
|
}
|
|
|
|
fn allocate_bars(
|
|
&mut self,
|
|
allocator: &mut SystemAllocator,
|
|
) -> std::result::Result<Vec<(GuestAddress, GuestUsize, PciBarRegionType)>, PciDeviceError>
|
|
{
|
|
let mut ranges = Vec::new();
|
|
let device_clone = self.device.clone();
|
|
let device = device_clone.lock().unwrap();
|
|
|
|
// Allocate the virtio-pci capability BAR.
|
|
// See http://docs.oasis-open.org/virtio/virtio/v1.0/cs04/virtio-v1.0-cs04.html#x1-740004
|
|
let (virtio_pci_bar_addr, region_type) = if self.use_64bit_bar {
|
|
let region_type = PciBarRegionType::Memory64BitRegion;
|
|
let addr = allocator
|
|
.allocate_mmio_addresses(
|
|
self.settings_bar_addr,
|
|
CAPABILITY_BAR_SIZE,
|
|
Some(CAPABILITY_BAR_SIZE),
|
|
)
|
|
.ok_or(PciDeviceError::IoAllocationFailed(CAPABILITY_BAR_SIZE))?;
|
|
ranges.push((addr, CAPABILITY_BAR_SIZE, region_type));
|
|
(addr, region_type)
|
|
} else {
|
|
let region_type = PciBarRegionType::Memory32BitRegion;
|
|
let addr = allocator
|
|
.allocate_mmio_hole_addresses(
|
|
self.settings_bar_addr,
|
|
CAPABILITY_BAR_SIZE,
|
|
Some(CAPABILITY_BAR_SIZE),
|
|
)
|
|
.ok_or(PciDeviceError::IoAllocationFailed(CAPABILITY_BAR_SIZE))?;
|
|
ranges.push((addr, CAPABILITY_BAR_SIZE, region_type));
|
|
(addr, region_type)
|
|
};
|
|
self.bar_regions
|
|
.push((virtio_pci_bar_addr, CAPABILITY_BAR_SIZE, region_type));
|
|
|
|
let config = PciBarConfiguration::default()
|
|
.set_register_index(0)
|
|
.set_address(virtio_pci_bar_addr.raw_value())
|
|
.set_size(CAPABILITY_BAR_SIZE)
|
|
.set_region_type(region_type);
|
|
let virtio_pci_bar =
|
|
self.configuration.add_pci_bar(&config).map_err(|e| {
|
|
PciDeviceError::IoRegistrationFailed(virtio_pci_bar_addr.raw_value(), e)
|
|
})? as u8;
|
|
|
|
// Once the BARs are allocated, the capabilities can be added to the PCI configuration.
|
|
self.add_pci_capabilities(virtio_pci_bar)?;
|
|
|
|
// Allocate a dedicated BAR if there are some shared memory regions.
|
|
if let Some(shm_list) = device.get_shm_regions() {
|
|
let config = PciBarConfiguration::default()
|
|
.set_register_index(2)
|
|
.set_address(shm_list.addr.raw_value())
|
|
.set_size(shm_list.len);
|
|
let virtio_pci_shm_bar =
|
|
self.configuration.add_pci_bar(&config).map_err(|e| {
|
|
PciDeviceError::IoRegistrationFailed(shm_list.addr.raw_value(), e)
|
|
})? as u8;
|
|
|
|
let region_type = PciBarRegionType::Memory64BitRegion;
|
|
ranges.push((shm_list.addr, shm_list.len, region_type));
|
|
self.bar_regions
|
|
.push((shm_list.addr, shm_list.len, region_type));
|
|
|
|
for (idx, shm) in shm_list.region_list.iter().enumerate() {
|
|
let shm_cap = VirtioPciCap64::new(
|
|
PciCapabilityType::SharedMemoryConfig,
|
|
virtio_pci_shm_bar,
|
|
idx as u8,
|
|
shm.offset,
|
|
shm.len,
|
|
);
|
|
self.configuration
|
|
.add_capability(&shm_cap)
|
|
.map_err(PciDeviceError::CapabilitiesSetup)?;
|
|
}
|
|
}
|
|
|
|
Ok(ranges)
|
|
}
|
|
|
|
fn free_bars(
|
|
&mut self,
|
|
allocator: &mut SystemAllocator,
|
|
) -> std::result::Result<(), PciDeviceError> {
|
|
for (addr, length, type_) in self.bar_regions.drain(..) {
|
|
match type_ {
|
|
PciBarRegionType::Memory32BitRegion => {
|
|
allocator.free_mmio_hole_addresses(addr, length);
|
|
}
|
|
PciBarRegionType::Memory64BitRegion => {
|
|
allocator.free_mmio_addresses(addr, length);
|
|
}
|
|
_ => error!("Unexpected PCI bar type"),
|
|
}
|
|
}
|
|
Ok(())
|
|
}
|
|
|
|
fn move_bar(&mut self, old_base: u64, new_base: u64) -> result::Result<(), std::io::Error> {
|
|
// We only update our idea of the bar in order to support free_bars() above.
|
|
// The majority of the reallocation is done inside DeviceManager.
|
|
for (addr, _, _) in self.bar_regions.iter_mut() {
|
|
if (*addr).0 == old_base {
|
|
*addr = GuestAddress(new_base);
|
|
}
|
|
}
|
|
|
|
Ok(())
|
|
}
|
|
|
|
fn read_bar(&mut self, _base: u64, offset: u64, data: &mut [u8]) {
|
|
match offset {
|
|
o if o < COMMON_CONFIG_BAR_OFFSET + COMMON_CONFIG_SIZE => self.common_config.read(
|
|
o - COMMON_CONFIG_BAR_OFFSET,
|
|
data,
|
|
&mut self.queues,
|
|
self.device.clone(),
|
|
),
|
|
o if ISR_CONFIG_BAR_OFFSET <= o && o < ISR_CONFIG_BAR_OFFSET + ISR_CONFIG_SIZE => {
|
|
if let Some(v) = data.get_mut(0) {
|
|
// Reading this register resets it to 0.
|
|
*v = self.interrupt_status.swap(0, Ordering::AcqRel) as u8;
|
|
}
|
|
}
|
|
o if DEVICE_CONFIG_BAR_OFFSET <= o
|
|
&& o < DEVICE_CONFIG_BAR_OFFSET + DEVICE_CONFIG_SIZE =>
|
|
{
|
|
let device = self.device.lock().unwrap();
|
|
device.read_config(o - DEVICE_CONFIG_BAR_OFFSET, data);
|
|
}
|
|
o if NOTIFICATION_BAR_OFFSET <= o
|
|
&& o < NOTIFICATION_BAR_OFFSET + NOTIFICATION_SIZE =>
|
|
{
|
|
// Handled with ioeventfds.
|
|
}
|
|
o if MSIX_TABLE_BAR_OFFSET <= o && o < MSIX_TABLE_BAR_OFFSET + MSIX_TABLE_SIZE => {
|
|
if let Some(msix_config) = &self.msix_config {
|
|
msix_config
|
|
.lock()
|
|
.unwrap()
|
|
.read_table(o - MSIX_TABLE_BAR_OFFSET, data);
|
|
}
|
|
}
|
|
o if MSIX_PBA_BAR_OFFSET <= o && o < MSIX_PBA_BAR_OFFSET + MSIX_PBA_SIZE => {
|
|
if let Some(msix_config) = &self.msix_config {
|
|
msix_config
|
|
.lock()
|
|
.unwrap()
|
|
.read_pba(o - MSIX_PBA_BAR_OFFSET, data);
|
|
}
|
|
}
|
|
_ => (),
|
|
}
|
|
}
|
|
|
|
fn write_bar(&mut self, _base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
|
|
match offset {
|
|
o if o < COMMON_CONFIG_BAR_OFFSET + COMMON_CONFIG_SIZE => self.common_config.write(
|
|
o - COMMON_CONFIG_BAR_OFFSET,
|
|
data,
|
|
&mut self.queues,
|
|
self.device.clone(),
|
|
),
|
|
o if ISR_CONFIG_BAR_OFFSET <= o && o < ISR_CONFIG_BAR_OFFSET + ISR_CONFIG_SIZE => {
|
|
if let Some(v) = data.get(0) {
|
|
self.interrupt_status
|
|
.fetch_and(!(*v as usize), Ordering::AcqRel);
|
|
}
|
|
}
|
|
o if DEVICE_CONFIG_BAR_OFFSET <= o
|
|
&& o < DEVICE_CONFIG_BAR_OFFSET + DEVICE_CONFIG_SIZE =>
|
|
{
|
|
let mut device = self.device.lock().unwrap();
|
|
device.write_config(o - DEVICE_CONFIG_BAR_OFFSET, data);
|
|
}
|
|
o if NOTIFICATION_BAR_OFFSET <= o
|
|
&& o < NOTIFICATION_BAR_OFFSET + NOTIFICATION_SIZE =>
|
|
{
|
|
// Handled with ioeventfds.
|
|
}
|
|
o if MSIX_TABLE_BAR_OFFSET <= o && o < MSIX_TABLE_BAR_OFFSET + MSIX_TABLE_SIZE => {
|
|
if let Some(msix_config) = &self.msix_config {
|
|
msix_config
|
|
.lock()
|
|
.unwrap()
|
|
.write_table(o - MSIX_TABLE_BAR_OFFSET, data);
|
|
}
|
|
}
|
|
o if MSIX_PBA_BAR_OFFSET <= o && o < MSIX_PBA_BAR_OFFSET + MSIX_PBA_SIZE => {
|
|
if let Some(msix_config) = &self.msix_config {
|
|
msix_config
|
|
.lock()
|
|
.unwrap()
|
|
.write_pba(o - MSIX_PBA_BAR_OFFSET, data);
|
|
}
|
|
}
|
|
_ => (),
|
|
};
|
|
|
|
// Try and activate the device if the driver status has changed
|
|
if self.needs_activation() {
|
|
info!(
|
|
"{}: Needs activation; writing to activate event fd",
|
|
self.id
|
|
);
|
|
self.activate_evt.write(1).ok();
|
|
info!("{}: Needs activation; returning barrier", self.id);
|
|
return Some(self.activate_barrier.clone());
|
|
}
|
|
|
|
// Device has been reset by the driver
|
|
if self.device_activated.load(Ordering::SeqCst) && self.is_driver_init() {
|
|
let mut device = self.device.lock().unwrap();
|
|
if let Some(virtio_interrupt) = device.reset() {
|
|
// Upon reset the device returns its interrupt EventFD
|
|
self.virtio_interrupt = Some(virtio_interrupt);
|
|
self.device_activated.store(false, Ordering::SeqCst);
|
|
|
|
// Reset queue readiness (changes queue_enable), queue sizes
|
|
// and selected_queue as per spec for reset
|
|
self.queues.iter_mut().for_each(Queue::reset);
|
|
self.common_config.queue_select = 0;
|
|
} else {
|
|
error!("Attempt to reset device when not implemented in underlying device");
|
|
self.common_config.driver_status = crate::DEVICE_FAILED as u8;
|
|
}
|
|
}
|
|
|
|
None
|
|
}
|
|
|
|
fn as_any(&mut self) -> &mut dyn Any {
|
|
self
|
|
}
|
|
}
|
|
|
|
impl BusDevice for VirtioPciDevice {
|
|
fn read(&mut self, base: u64, offset: u64, data: &mut [u8]) {
|
|
self.read_bar(base, offset, data)
|
|
}
|
|
|
|
fn write(&mut self, base: u64, offset: u64, data: &[u8]) -> Option<Arc<Barrier>> {
|
|
self.write_bar(base, offset, data)
|
|
}
|
|
}
|
|
|
|
impl Pausable for VirtioPciDevice {
|
|
fn pause(&mut self) -> result::Result<(), MigratableError> {
|
|
Ok(())
|
|
}
|
|
|
|
fn resume(&mut self) -> result::Result<(), MigratableError> {
|
|
Ok(())
|
|
}
|
|
}
|
|
|
|
impl Snapshottable for VirtioPciDevice {
|
|
fn id(&self) -> String {
|
|
self.id.clone()
|
|
}
|
|
|
|
fn snapshot(&mut self) -> std::result::Result<Snapshot, MigratableError> {
|
|
let mut virtio_pci_dev_snapshot =
|
|
Snapshot::new_from_versioned_state(&self.id, &self.state())?;
|
|
|
|
// Snapshot PciConfiguration
|
|
virtio_pci_dev_snapshot.add_snapshot(self.configuration.snapshot()?);
|
|
|
|
// Snapshot VirtioPciCommonConfig
|
|
virtio_pci_dev_snapshot.add_snapshot(self.common_config.snapshot()?);
|
|
|
|
// Snapshot MSI-X
|
|
if let Some(msix_config) = &self.msix_config {
|
|
virtio_pci_dev_snapshot.add_snapshot(msix_config.lock().unwrap().snapshot()?);
|
|
}
|
|
|
|
Ok(virtio_pci_dev_snapshot)
|
|
}
|
|
|
|
fn restore(&mut self, snapshot: Snapshot) -> std::result::Result<(), MigratableError> {
|
|
if let Some(virtio_pci_dev_section) =
|
|
snapshot.snapshot_data.get(&format!("{}-section", self.id))
|
|
{
|
|
// Restore MSI-X
|
|
if let Some(msix_config) = &self.msix_config {
|
|
let id = msix_config.lock().unwrap().id();
|
|
if let Some(msix_snapshot) = snapshot.snapshots.get(&id) {
|
|
msix_config
|
|
.lock()
|
|
.unwrap()
|
|
.restore(*msix_snapshot.clone())?;
|
|
}
|
|
}
|
|
|
|
// Restore VirtioPciCommonConfig
|
|
if let Some(virtio_config_snapshot) = snapshot.snapshots.get(&self.common_config.id()) {
|
|
self.common_config
|
|
.restore(*virtio_config_snapshot.clone())?;
|
|
}
|
|
|
|
// Restore PciConfiguration
|
|
if let Some(pci_config_snapshot) = snapshot.snapshots.get(&self.configuration.id()) {
|
|
self.configuration.restore(*pci_config_snapshot.clone())?;
|
|
}
|
|
|
|
// First restore the status of the virtqueues.
|
|
self.set_state(&virtio_pci_dev_section.to_versioned_state()?)
|
|
.map_err(|e| {
|
|
MigratableError::Restore(anyhow!(
|
|
"Could not restore VIRTIO_PCI_DEVICE state {:?}",
|
|
e
|
|
))
|
|
})?;
|
|
|
|
// Then we can activate the device, as we know at this point that
|
|
// the virtqueues are in the right state and the device is ready
|
|
// to be activated, which will spawn each virtio worker thread.
|
|
if self.device_activated.load(Ordering::SeqCst) && self.is_driver_ready() {
|
|
self.activate().map_err(|e| {
|
|
MigratableError::Restore(anyhow!("Failed activating the device: {:?}", e))
|
|
})?;
|
|
}
|
|
|
|
return Ok(());
|
|
}
|
|
|
|
Err(MigratableError::Restore(anyhow!(
|
|
"Could not find VIRTIO_PCI_DEVICE snapshot section"
|
|
)))
|
|
}
|
|
}
|
|
impl Transportable for VirtioPciDevice {}
|
|
impl Migratable for VirtioPciDevice {}
|