Sebastien Boeuf e18052120a vfio: Fix Memory BAR alignment ...

The IO BAR alignment was already set to 4 bytes, this patch simply added
a comment for it.

The Memory BAR alignment was also set to the right value, but it was not
explained why 0x1000 was needed, and also why 0x10 could sometimes be
used as correct alignment.
A Memory BAR must be aligned at least on 16 bytes since the first 4 bits
are dedicated to some specific information about the BAR itself. But in
case a BAR is identified as mappable from VFIO, this means our VMM might
memory map it into the VMM address space, and set KVM accordingly using
the ioctl KVM_SET_USER_MEMORY_REGION. In case of KVM, we have to take
into account that it expects addresses to be page aligned, which means
4K in this case.

Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>

2019-07-25 11:45:38 +01:00

..

src

vfio: Fix Memory BAR alignment

2019-07-25 11:45:38 +01:00

Cargo.toml

vfio: Initial PCI support

2019-07-24 11:55:08 +02:00