mirror of
https://github.com/cloud-hypervisor/cloud-hypervisor.git
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0faa7afac2
Looking up devices on the port I/O bus is time consuming during the
boot at there is an O(lg n) tree lookup and the overhead from taking a
lock on the bus contents.
Avoid this by adding a fast path uses the hardcoded port address and
size and directs PCI config requests directly to the device.
Command line:
target/release/cloud-hypervisor --kernel ~/src/linux/vmlinux --cmdline "root=/dev/vda1 console=ttyS0" --serial tty --console off --disk path=~/workloads/focal-server-cloudimg-amd64-custom-20210609-0.raw --api-socket /tmp/api
PIO exit: 17913
PCI fast path: 17871
Percentage on fast path: 99.8%
perf before:
marvin:~/src/cloud-hypervisor (main *)$ perf report -g | grep resolve
6.20% 6.20% vcpu0 cloud-hypervisor [.] vm_device:🚌:Bus::resolve
perf after:
marvin:~/src/cloud-hypervisor (2021-09-17-ioapic-fast-path *)$ perf report -g | grep resolve
0.08% 0.08% vcpu0 cloud-hypervisor [.] vm_device:🚌:Bus::resolve
The compromise required to implement this fast path is bringing the
creation of the PciConfigIo device into the DeviceManager::new() so that
it can be used in the VmmOps struct which is created before
DeviceManager::create_devices() is called.
Signed-off-by: Rob Bradford <robert.bradford@intel.com>
50 lines
1.4 KiB
Rust
50 lines
1.4 KiB
Rust
// Copyright 2018 The Chromium OS Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE-BSD-3-Clause file.
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//! Implements pci devices and busses.
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#[macro_use]
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extern crate log;
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mod bus;
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mod configuration;
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mod device;
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mod msi;
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mod msix;
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mod vfio;
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mod vfio_user;
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pub use self::bus::{PciBus, PciConfigIo, PciConfigMmio, PciRoot, PciRootError};
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pub use self::configuration::{
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PciBarConfiguration, PciBarPrefetchable, PciBarRegionType, PciCapability, PciCapabilityId,
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PciClassCode, PciConfiguration, PciHeaderType, PciMassStorageSubclass,
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PciNetworkControllerSubclass, PciProgrammingInterface, PciSerialBusSubClass, PciSubclass,
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};
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pub use self::device::{
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BarReprogrammingParams, DeviceRelocation, Error as PciDeviceError, PciDevice,
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};
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pub use self::msi::{msi_num_enabled_vectors, MsiCap, MsiConfig};
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pub use self::msix::{MsixCap, MsixConfig, MsixTableEntry, MSIX_TABLE_ENTRY_SIZE};
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pub use self::vfio::{VfioPciDevice, VfioPciError};
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pub use self::vfio_user::{VfioUserPciDevice, VfioUserPciDeviceError};
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/// PCI has four interrupt pins A->D.
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#[derive(Copy, Clone)]
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pub enum PciInterruptPin {
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IntA,
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IntB,
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IntC,
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IntD,
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}
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impl PciInterruptPin {
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pub fn to_mask(self) -> u32 {
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self as u32
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}
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}
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#[cfg(target_arch = "x86_64")]
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pub const PCI_CONFIG_IO_PORT: u64 = 0xcf8;
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#[cfg(target_arch = "x86_64")]
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pub const PCI_CONFIG_IO_PORT_SIZE: u64 = 0x8;
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