cloud-hypervisor/hypervisor
Samuel Ortiz fc5d6c96be hypervisor: x86: Add a minimal CpuStateManager implementation
Minimal will be defined by the amount of emulated instructions.
Carrying all GPRs, all CRs, segment registers and table registers should
cover quite a few instructions.

Co-developed-by: Wei Liu <liuwe@microsoft.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2020-11-25 17:02:11 +01:00
..
src hypervisor: x86: Add a minimal CpuStateManager implementation 2020-11-25 17:02:11 +01:00
Cargo.toml hypervisor: x86: Add a CpuStateManager interface 2020-11-25 17:02:11 +01:00