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bhyve: tests: Add missing data files

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Add missing data files for bhyve cpu topology tests that should have been
added in b66fda0a74.

Signed-off-by: Roman Bogorodskiy <bogorodskiy@gmail.com>
This commit is contained in:
Roman Bogorodskiy 2018-06-08 21:52:17 +04:00
parent fef4d132c4
commit 057a78ea31
4 changed files with 64 additions and 0 deletions
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26
tests/bhyvexml2argvdata/bhyvexml2argv-cputopology-nvcpu-mismatch.xml Normal file
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@ -0,0 +1,26 @@
<domain type='bhyve'>
<name>bhyve</name>
<uuid>df3be7e7-a104-11e3-aeb0-50e5492bd3dc</uuid>
<memory>219136</memory>
<vcpu>4</vcpu>
<cpu>
<topology sockets='1' cores='2' threads='1'/>
</cpu>
<os>
<type>hvm</type>
</os>
<devices>
<disk type='file'>
<driver name='file' type='raw'/>
<source file='/tmp/freebsd.img'/>
<target dev='hda' bus='sata'/>
<address type='drive' controller='0' bus='0' target='2' unit='0'/>
</disk>
<interface type='bridge'>
<mac address='52:54:00:b9:94:02'/>
<model type='virtio'/>
<source bridge="virbr0"/>
<address type='pci' domain='0x0000' bus='0x00' slot='0x03' function='0x0'/>
</interface>
</devices>
</domain>

9
tests/bhyvexml2argvdata/bhyvexml2argv-cputopology.args Normal file
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/usr/sbin/bhyve \
-c cpus=2,sockets=1,cores=2,threads=1 \
-m 214 \
-u \
-H \
-P \
-s 0:0,hostbridge \
-s 2:0,ahci,hd:/tmp/freebsd.img \
-s 3:0,virtio-net,faketapdev,mac=52:54:00:b9:94:02 bhyve

3
tests/bhyvexml2argvdata/bhyvexml2argv-cputopology.ldargs Normal file
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/usr/sbin/bhyveload \
-m 214 \
-d /tmp/freebsd.img bhyve

26
tests/bhyvexml2argvdata/bhyvexml2argv-cputopology.xml Normal file
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@ -0,0 +1,26 @@
<domain type='bhyve'>
<name>bhyve</name>
<uuid>df3be7e7-a104-11e3-aeb0-50e5492bd3dc</uuid>
<memory>219136</memory>
<vcpu>2</vcpu>
<cpu>
<topology sockets='1' cores='2' threads='1'/>
</cpu>
<os>
<type>hvm</type>
</os>
<devices>
<disk type='file'>
<driver name='file' type='raw'/>
<source file='/tmp/freebsd.img'/>
<target dev='hda' bus='sata'/>
<address type='drive' controller='0' bus='0' target='2' unit='0'/>
</disk>
<interface type='bridge'>
<mac address='52:54:00:b9:94:02'/>
<model type='virtio'/>
<source bridge="virbr0"/>
<address type='pci' domain='0x0000' bus='0x00' slot='0x03' function='0x0'/>
</interface>
</devices>
</domain>