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qemuxml2argvtest: Reorder CPU features

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The x86 CPU driver translated each CPU definition from domain XML into
CPUID data and then back to CPU definition. This effectively sorted the
list of CPU features according to their CPUID values. Since this is
going to change, we need to reorder CPU features in a few test files to
make sure the generated QEMU command lines will not change.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
This commit is contained in:
Jiri Denemark 2016-08-05 14:42:15 +02:00
parent d029f9a0db
commit 0b7cf7f744
9 changed files with 93 additions and 93 deletions
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2
tests/qemuxml2argvdata/qemuxml2argv-cpu-Haswell2.xml
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@ -10,8 +10,8 @@
</os>
<cpu mode='custom' match='exact'>
<model fallback='forbid'>Haswell</model>
<feature policy='disable' name='rtm'/>
<feature policy='disable' name='hle'/>
<feature policy='disable' name='rtm'/>
</cpu>
<clock offset='utc'/>
<on_poweroff>destroy</on_poweroff>

12
tests/qemuxml2argvdata/qemuxml2argv-cpu-exact1.xml
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@ -10,13 +10,13 @@
</os>
<cpu match='exact'>
<model fallback='allow'>qemu64</model>
<feature policy='disable' name='svm'/>
<feature policy='disable' name='lm'/>
<feature policy='disable' name='nx'/>
<feature policy='disable' name='syscall'/>
<feature policy='disable' name='clflush'/>
<feature policy='disable' name='pse36'/>
<feature policy='disable' name='mca'/>
<feature policy='disable' name='pse36'/>
<feature policy='disable' name='clflush'/>
<feature policy='disable' name='syscall'/>
<feature policy='disable' name='nx'/>
<feature policy='disable' name='lm'/>
<feature policy='disable' name='svm'/>
</cpu>
<clock offset='utc'/>
<on_poweroff>destroy</on_poweroff>

14
tests/qemuxml2argvdata/qemuxml2argv-cpu-exact2-nofallback.xml
View File

@ -10,18 +10,18 @@
</os>
<cpu match='exact'>
<model fallback='forbid'>core2duo</model>
<feature name='lahf_lm' policy='require'/>
<feature name='ds' policy='require'/>
<feature name='ht' policy='require'/>
<feature name='tm' policy='optional'/>
<feature name='ds_cpl' policy='require'/>
<feature name='xtpr' policy='require'/>
<feature name='3dnowext' policy='force'/>
<feature name='lahf_lm' policy='require'/>
<feature name='nx' policy='disable'/>
<feature name='cx16' policy='disable'/>
<feature name='tm2' policy='disable'/>
<feature name='ds_cpl' policy='require'/>
<feature name='pbe' policy='disable'/>
<feature name='tm' policy='optional'/>
<feature name='ht' policy='require'/>
<feature name='ss' policy='disable'/>
<feature name='ds' policy='require'/>
<feature name='nx' policy='disable'/>
<feature name='3dnowext' policy='force'/>
<feature name='sse4a' policy='optional'/>
<feature name='wdt' policy='forbid'/>
</cpu>

14
tests/qemuxml2argvdata/qemuxml2argv-cpu-exact2.xml
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@ -10,18 +10,18 @@
</os>
<cpu match='exact'>
<model>core2duo</model>
<feature name='lahf_lm' policy='require'/>
<feature name='ds' policy='require'/>
<feature name='ht' policy='require'/>
<feature name='tm' policy='optional'/>
<feature name='ds_cpl' policy='require'/>
<feature name='xtpr' policy='require'/>
<feature name='3dnowext' policy='force'/>
<feature name='lahf_lm' policy='require'/>
<feature name='nx' policy='disable'/>
<feature name='cx16' policy='disable'/>
<feature name='tm2' policy='disable'/>
<feature name='ds_cpl' policy='require'/>
<feature name='pbe' policy='disable'/>
<feature name='tm' policy='optional'/>
<feature name='ht' policy='require'/>
<feature name='ss' policy='disable'/>
<feature name='ds' policy='require'/>
<feature name='nx' policy='disable'/>
<feature name='3dnowext' policy='force'/>
<feature name='sse4a' policy='optional'/>
<feature name='wdt' policy='forbid'/>
</cpu>

6
tests/qemuxml2argvdata/qemuxml2argv-cpu-minimum2.xml
View File

@ -10,10 +10,10 @@
</os>
<cpu match='minimum'>
<model>qemu64</model>
<feature policy='disable' name='svm'/>
<feature policy='disable' name='lm'/>
<feature policy='disable' name='nx'/>
<feature policy='disable' name='syscall'/>
<feature policy='disable' name='nx'/>
<feature policy='disable' name='lm'/>
<feature policy='disable' name='svm'/>
</cpu>
<clock offset='utc'/>
<on_poweroff>destroy</on_poweroff>

20
tests/qemuxml2argvdata/qemuxml2argv-cpu-strict1.xml
View File

@ -10,21 +10,21 @@
</os>
<cpu match='strict'>
<model>core2duo</model>
<feature name='lahf_lm' policy='require'/>
<feature name='ds' policy='require'/>
<feature name='acpi' policy='optional'/>
<feature name='ht' policy='require'/>
<feature name='tm' policy='optional'/>
<feature name='ds_cpl' policy='require'/>
<feature name='vmx' policy='optional'/>
<feature name='est' policy='optional'/>
<feature name='xtpr' policy='require'/>
<feature name='3dnowext' policy='force'/>
<feature name='lahf_lm' policy='require'/>
<feature name='nx' policy='disable'/>
<feature name='cx16' policy='disable'/>
<feature name='tm2' policy='disable'/>
<feature name='est' policy='optional'/>
<feature name='vmx' policy='optional'/>
<feature name='ds_cpl' policy='require'/>
<feature name='pbe' policy='disable'/>
<feature name='tm' policy='optional'/>
<feature name='ht' policy='require'/>
<feature name='ss' policy='disable'/>
<feature name='acpi' policy='optional'/>
<feature name='ds' policy='require'/>
<feature name='nx' policy='disable'/>
<feature name='3dnowext' policy='force'/>
<feature name='sse4a' policy='optional'/>
<feature name='wdt' policy='forbid'/>
</cpu>

24
tests/qemuxml2argvdata/qemuxml2argv-graphics-spice-timeout.xml
View File

@ -19,19 +19,19 @@
<model>core2duo</model>
<vendor>Intel</vendor>
<topology sockets='1' cores='2' threads='1'/>
<feature policy='require' name='lahf_lm'/>
<feature policy='require' name='xtpr'/>
<feature policy='require' name='cx16'/>
<feature policy='require' name='tm2'/>
<feature policy='require' name='est'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='tm'/>
<feature policy='require' name='ht'/>
<feature policy='require' name='ss'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
<feature policy='require' name='ht'/>
<feature policy='require' name='tm'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='est'/>
<feature policy='require' name='tm2'/>
<feature policy='require' name='cx16'/>
<feature policy='require' name='xtpr'/>
<feature policy='require' name='lahf_lm'/>
</cpu>
<clock offset='utc'/>
<on_poweroff>destroy</on_poweroff>

24
tests/qemuxml2xmloutdata/qemuxml2xmlout-graphics-spice-timeout.xml
View File

@ -19,19 +19,19 @@
<model fallback='allow'>core2duo</model>
<vendor>Intel</vendor>
<topology sockets='1' cores='2' threads='1'/>
<feature policy='require' name='lahf_lm'/>
<feature policy='require' name='xtpr'/>
<feature policy='require' name='cx16'/>
<feature policy='require' name='tm2'/>
<feature policy='require' name='est'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='tm'/>
<feature policy='require' name='ht'/>
<feature policy='require' name='ss'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ds'/>
<feature policy='require' name='acpi'/>
<feature policy='require' name='ss'/>
<feature policy='require' name='ht'/>
<feature policy='require' name='tm'/>
<feature policy='require' name='pbe'/>
<feature policy='require' name='ds_cpl'/>
<feature policy='require' name='vmx'/>
<feature policy='require' name='est'/>
<feature policy='require' name='tm2'/>
<feature policy='require' name='cx16'/>
<feature policy='require' name='xtpr'/>
<feature policy='require' name='lahf_lm'/>
</cpu>
<clock offset='utc'/>
<on_poweroff>destroy</on_poweroff>

70
tests/testutilsqemu.c
View File

@ -19,19 +19,19 @@ virCPUDefPtr cpuHaswell;
virCPUDefPtr cpuPower8;
static virCPUFeatureDef cpuDefaultFeatures[] = {
{ (char *) "lahf_lm", -1 },
{ (char *) "xtpr", -1 },
{ (char *) "cx16", -1 },
{ (char *) "tm2", -1 },
{ (char *) "est", -1 },
{ (char *) "vmx", -1 },
{ (char *) "ds_cpl", -1 },
{ (char *) "pbe", -1 },
{ (char *) "tm", -1 },
{ (char *) "ht", -1 },
{ (char *) "ss", -1 },
{ (char *) "ds", -1 },
{ (char *) "acpi", -1 },
{ (char *) "ds", -1 }
{ (char *) "ss", -1 },
{ (char *) "ht", -1 },
{ (char *) "tm", -1 },
{ (char *) "pbe", -1 },
{ (char *) "ds_cpl", -1 },
{ (char *) "vmx", -1 },
{ (char *) "est", -1 },
{ (char *) "tm2", -1 },
{ (char *) "cx16", -1 },
{ (char *) "xtpr", -1 },
{ (char *) "lahf_lm", -1 },
};
static virCPUDef cpuDefaultData = {
VIR_CPU_TYPE_HOST, /* type */
@ -51,30 +51,30 @@ static virCPUDef cpuDefaultData = {
};
static virCPUFeatureDef cpuHaswellFeatures[] = {
{ (char *) "lahf_lm", -1 },
{ (char *) "invtsc", -1 },
{ (char *) "abm", -1 },
{ (char *) "pdpe1gb", -1 },
{ (char *) "cmt", -1 },
{ (char *) "rdrand", -1 },
{ (char *) "f16c", -1 },
{ (char *) "osxsave", -1 },
{ (char *) "pdcm", -1 },
{ (char *) "xtpr", -1 },
{ (char *) "tm2", -1 },
{ (char *) "est", -1 },
{ (char *) "smx", -1 },
{ (char *) "vmx", -1 },
{ (char *) "ds_cpl", -1 },
{ (char *) "monitor", -1 },
{ (char *) "dtes64", -1 },
{ (char *) "pbe", -1 },
{ (char *) "tm", -1 },
{ (char *) "ht", -1 },
{ (char *) "ss", -1 },
{ (char *) "acpi", -1 },
{ (char *) "ds", -1 },
{ (char *) "vme", -1 },
{ (char *) "ds", -1 },
{ (char *) "acpi", -1 },
{ (char *) "ss", -1 },
{ (char *) "ht", -1 },
{ (char *) "tm", -1 },
{ (char *) "pbe", -1 },
{ (char *) "dtes64", -1 },
{ (char *) "monitor", -1 },
{ (char *) "ds_cpl", -1 },
{ (char *) "vmx", -1 },
{ (char *) "smx", -1 },
{ (char *) "est", -1 },
{ (char *) "tm2", -1 },
{ (char *) "xtpr", -1 },
{ (char *) "pdcm", -1 },
{ (char *) "osxsave", -1 },
{ (char *) "f16c", -1 },
{ (char *) "rdrand", -1 },
{ (char *) "cmt", -1 },
{ (char *) "pdpe1gb", -1 },
{ (char *) "abm", -1 },
{ (char *) "invtsc", -1 },
{ (char *) "lahf_lm", -1 },
};
static virCPUDef cpuHaswellData = {
VIR_CPU_TYPE_HOST, /* type */