pci: fix link maximum speed detection

Commit 8e09663 "pci: recognize/report GEN4 (PCIe 4.0) card 16GT/s Link
speed" introduced another speed into enum, but mistakenly also altered
field width, so one bit of link width was included there.

Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
This commit is contained in:
Marek Marczykowski-Górecki 2017-05-16 15:19:19 +02:00 committed by Michal Privoznik
parent 7823e2561b
commit 1128769f9e

View File

@ -147,7 +147,7 @@ struct _virPCIDeviceList {
#define PCI_EXP_DEVCAP 0x4 /* Device capabilities */
#define PCI_EXP_DEVCAP_FLR (1<<28) /* Function Level Reset */
#define PCI_EXP_LNKCAP 0xc /* Link Capabilities */
#define PCI_EXP_LNKCAP_SPEED 0x0001f /* Maximum Link Speed */
#define PCI_EXP_LNKCAP_SPEED 0x0000f /* Maximum Link Speed */
#define PCI_EXP_LNKCAP_WIDTH 0x003f0 /* Maximum Link Width */
#define PCI_EXP_LNKSTA 0x12 /* Link Status */
#define PCI_EXP_LNKSTA_SPEED 0x000f /* Negotiated Link Speed */