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pci: fix link maximum speed detection
Commit 8e09663
"pci: recognize/report GEN4 (PCIe 4.0) card 16GT/s Link
speed" introduced another speed into enum, but mistakenly also altered
field width, so one bit of link width was included there.
Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
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@ -147,7 +147,7 @@ struct _virPCIDeviceList {
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#define PCI_EXP_DEVCAP 0x4 /* Device capabilities */
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#define PCI_EXP_DEVCAP_FLR (1<<28) /* Function Level Reset */
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#define PCI_EXP_LNKCAP 0xc /* Link Capabilities */
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#define PCI_EXP_LNKCAP_SPEED 0x0001f /* Maximum Link Speed */
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#define PCI_EXP_LNKCAP_SPEED 0x0000f /* Maximum Link Speed */
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#define PCI_EXP_LNKCAP_WIDTH 0x003f0 /* Maximum Link Width */
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#define PCI_EXP_LNKSTA 0x12 /* Link Status */
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#define PCI_EXP_LNKSTA_SPEED 0x000f /* Negotiated Link Speed */
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