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Revert "perf: Add cache_l1d perf event support"

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This reverts commit ae16c95f1b.
This commit is contained in:
Daniel P. Berrange 2017-01-16 16:54:34 +00:00
parent b3e2fe2de3
commit 2d0c4947ab
9 changed files with 2 additions and 33 deletions
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7
docs/formatdomain.html.in
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@ -1937,7 +1937,6 @@
<event name='stalled_cycles_frontend' enabled='no'/>
<event name='stalled_cycles_backend' enabled='no'/>
<event name='ref_cpu_cycles' enabled='no'/>
<event name='cache_l1d' enabled='no'/>
</perf>
...
</pre>
@ -2016,12 +2015,6 @@
by applications running on the platform</td>
<td><code>perf.ref_cpu_cycles</code></td>
</tr>
<tr>
<td><code>cache_l1d</code></td>
<td>the count of total level 1 data cache by applications running on
the platform</td>
<td><code>perf.cache_l1d</code></td>
</tr>
</table>
<h3><a name="elementsDevices">Devices</a></h3>

1
docs/schemas/domaincommon.rng
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@ -433,7 +433,6 @@
<value>stalled_cycles_frontend</value>
<value>stalled_cycles_backend</value>
<value>ref_cpu_cycles</value>
<value>cache_l1d</value>
</choice>
</attribute>
<attribute name="enabled">

11
include/libvirt/libvirt-domain.h
View File

@ -2188,17 +2188,6 @@ void virDomainStatsRecordListFree(virDomainStatsRecordPtr *stats);
*/
# define VIR_PERF_PARAM_REF_CPU_CYCLES "ref_cpu_cycles"
/**
* VIR_PERF_PARAM_CACHE_L1D:
*
* Macro for typed parameter name that represents cache_l1d
* perf event which can be used to measure the count of total
* level 1 data cache by applications running on the platform.
* It corresponds to the "perf.cache_l1d" field in the
* *Stats APIs.
*/
# define VIR_PERF_PARAM_CACHE_L1D "cache_l1d"
int virDomainGetPerfEvents(virDomainPtr dom,
virTypedParameterPtr *params,
int *nparams,

2
src/libvirt-domain.c
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@ -11250,8 +11250,6 @@ virConnectGetDomainCapabilities(virConnectPtr conn,
* CPU frequency scaling by applications running
* as unsigned long long. It is produced by the
* ref_cpu_cycles perf event.
* "perf.cache_l1d" - The count of total level 1 data cache as unsigned
* long long. It is produced by cache_l1d perf event.
*
* Note that entire stats groups or individual stat fields may be missing from
* the output in case they are not supported by the given hypervisor, are not

1
src/qemu/qemu_driver.c
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@ -9877,7 +9877,6 @@ qemuDomainSetPerfEvents(virDomainPtr dom,
VIR_PERF_PARAM_STALLED_CYCLES_FRONTEND, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_STALLED_CYCLES_BACKEND, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_REF_CPU_CYCLES, VIR_TYPED_PARAM_BOOLEAN,
VIR_PERF_PARAM_CACHE_L1D, VIR_TYPED_PARAM_BOOLEAN,
NULL) < 0)
return -1;

6
src/util/virperf.c
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@ -43,8 +43,7 @@ VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST,
"cache_references", "cache_misses",
"branch_instructions", "branch_misses",
"bus_cycles", "stalled_cycles_frontend",
"stalled_cycles_backend", "ref_cpu_cycles",
"cache_l1d");
"stalled_cycles_backend", "ref_cpu_cycles");
struct virPerfEvent {
int type;
@ -113,9 +112,6 @@ static struct virPerfEventAttr attrs[] = {
.attrConfig = 0,
# endif
},
{.type = VIR_PERF_EVENT_CACHE_L1D,
.attrType = PERF_TYPE_HW_CACHE,
.attrConfig = PERF_COUNT_HW_CACHE_L1D},
};
typedef struct virPerfEventAttr *virPerfEventAttrPtr;

1
src/util/virperf.h
View File

@ -47,7 +47,6 @@ typedef enum {
the backend of the instruction
processor pipeline */
VIR_PERF_EVENT_REF_CPU_CYCLES, /* Count of ref cpu cycles */
VIR_PERF_EVENT_CACHE_L1D, /* Count of level 1 data cache*/
VIR_PERF_EVENT_LAST
} virPerfEventType;

1
tests/genericxml2xmlindata/generic-perf.xml
View File

@ -26,7 +26,6 @@
<event name='stalled_cycles_frontend' enabled='yes'/>
<event name='stalled_cycles_backend' enabled='yes'/>
<event name='ref_cpu_cycles' enabled='yes'/>
<event name='cache_l1d' enabled='yes'/>
</perf>
<devices>
</devices>

5
tools/virsh.pod
View File

@ -945,8 +945,7 @@ I<--perf> returns the statistics of all enabled perf events:
"perf.bus_cycles" - the count of bus cycles,
"perf.stalled_cycles_frontend" - the count of stalled frontend cpu cycles,
"perf.stalled_cycles_backend" - the count of stalled backend cpu cycles,
"perf.ref_cpu_cycles" - the count of ref cpu cycles,
"perf.cache_l1d" - the count of level 1 data cache
"perf.ref_cpu_cycles" - the count of ref cpu cycles
See the B<perf> command for more details about each event.
@ -2311,8 +2310,6 @@ B<Valid perf event names>
ref_cpu_cycles - Provides the count of total cpu cycles
not affected by CPU frequency scaling by
applications running on the platform.
cache_l1d - Provides the count of total level 1 data cache
by applications running on the platform.
B<Note>: The statistics can be retrieved using the B<domstats> command using
the I<--perf> flag.