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util: add RISC-V architectures

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Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Andrea Bolognani <abologna@redhat.com>
This commit is contained in:
Lubomir Rintel 2018-08-22 11:15:22 +02:00 committed by Andrea Bolognani
parent fa95035bd4
commit 2faf932266
5 changed files with 19 additions and 3 deletions
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2
docs/schemas/basictypes.rng
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@ -398,6 +398,8 @@
<value>ppc64</value> <value>ppc64</value>
<value>ppc64le</value> <value>ppc64le</value>
<value>ppcemb</value> <value>ppcemb</value>
<value>riscv32</value>
<value>riscv64</value>
<value>s390</value> <value>s390</value>
<value>s390x</value> <value>s390x</value>
<value>sh4</value> <value>sh4</value>

5
src/qemu/qemu_capabilities.c
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@ -2298,15 +2298,18 @@ static const char *preferredMachines[] =
"pseries", /* VIR_ARCH_PPC64LE */ "pseries", /* VIR_ARCH_PPC64LE */
"bamboo", /* VIR_ARCH_PPCEMB */ "bamboo", /* VIR_ARCH_PPCEMB */
"spike_v1.10", /* VIR_ARCH_RISCV32 */
"spike_v1.10", /* VIR_ARCH_RISCV64 */
NULL, /* VIR_ARCH_S390 (no QEMU impl) */ NULL, /* VIR_ARCH_S390 (no QEMU impl) */
"s390-ccw-virtio", /* VIR_ARCH_S390X */ "s390-ccw-virtio", /* VIR_ARCH_S390X */
"shix", /* VIR_ARCH_SH4 */ "shix", /* VIR_ARCH_SH4 */
"shix", /* VIR_ARCH_SH4EB */ "shix", /* VIR_ARCH_SH4EB */
"SS-5", /* VIR_ARCH_SPARC */ "SS-5", /* VIR_ARCH_SPARC */
"sun4u", /* VIR_ARCH_SPARC64 */ "sun4u", /* VIR_ARCH_SPARC64 */
"puv3", /* VIR_ARCH_UNICORE32 */ "puv3", /* VIR_ARCH_UNICORE32 */
"pc", /* VIR_ARCH_X86_64 */ "pc", /* VIR_ARCH_X86_64 */
"sim", /* VIR_ARCH_XTENSA */ "sim", /* VIR_ARCH_XTENSA */
"sim", /* VIR_ARCH_XTENSAEB */ "sim", /* VIR_ARCH_XTENSAEB */
}; };

2
src/qemu/qemu_domain.c
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@ -3306,6 +3306,8 @@ qemuDomainDefAddDefaultDevices(virDomainDefPtr def,
case VIR_ARCH_OR32: case VIR_ARCH_OR32:
case VIR_ARCH_PARISC: case VIR_ARCH_PARISC:
case VIR_ARCH_PARISC64: case VIR_ARCH_PARISC64:
case VIR_ARCH_RISCV32:
case VIR_ARCH_RISCV64:
case VIR_ARCH_PPCLE: case VIR_ARCH_PPCLE:
case VIR_ARCH_UNICORE32: case VIR_ARCH_UNICORE32:
case VIR_ARCH_XTENSA: case VIR_ARCH_XTENSA:

5
src/util/virarch.c
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@ -65,15 +65,18 @@ static const struct virArchData {
{ "ppc64le", 64, VIR_ARCH_LITTLE_ENDIAN }, { "ppc64le", 64, VIR_ARCH_LITTLE_ENDIAN },
{ "ppcemb", 32, VIR_ARCH_BIG_ENDIAN }, { "ppcemb", 32, VIR_ARCH_BIG_ENDIAN },
{ "riscv32", 32, VIR_ARCH_LITTLE_ENDIAN },
{ "riscv64", 64, VIR_ARCH_LITTLE_ENDIAN },
{ "s390", 32, VIR_ARCH_BIG_ENDIAN }, { "s390", 32, VIR_ARCH_BIG_ENDIAN },
{ "s390x", 64, VIR_ARCH_BIG_ENDIAN }, { "s390x", 64, VIR_ARCH_BIG_ENDIAN },
{ "sh4", 32, VIR_ARCH_LITTLE_ENDIAN }, { "sh4", 32, VIR_ARCH_LITTLE_ENDIAN },
{ "sh4eb", 64, VIR_ARCH_BIG_ENDIAN }, { "sh4eb", 64, VIR_ARCH_BIG_ENDIAN },
{ "sparc", 32, VIR_ARCH_BIG_ENDIAN }, { "sparc", 32, VIR_ARCH_BIG_ENDIAN },
{ "sparc64", 64, VIR_ARCH_BIG_ENDIAN }, { "sparc64", 64, VIR_ARCH_BIG_ENDIAN },
{ "unicore32", 32, VIR_ARCH_LITTLE_ENDIAN }, { "unicore32", 32, VIR_ARCH_LITTLE_ENDIAN },
{ "x86_64", 64, VIR_ARCH_LITTLE_ENDIAN }, { "x86_64", 64, VIR_ARCH_LITTLE_ENDIAN },
{ "xtensa", 32, VIR_ARCH_LITTLE_ENDIAN }, { "xtensa", 32, VIR_ARCH_LITTLE_ENDIAN },
{ "xtensaeb", 32, VIR_ARCH_BIG_ENDIAN }, { "xtensaeb", 32, VIR_ARCH_BIG_ENDIAN },
}; };

8
src/util/virarch.h
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@ -55,15 +55,18 @@ typedef enum {
VIR_ARCH_PPC64LE, /* PowerPC 64 LE http://en.wikipedia.org/wiki/PowerPC */ VIR_ARCH_PPC64LE, /* PowerPC 64 LE http://en.wikipedia.org/wiki/PowerPC */
VIR_ARCH_PPCEMB, /* PowerPC 32 BE http://en.wikipedia.org/wiki/PowerPC */ VIR_ARCH_PPCEMB, /* PowerPC 32 BE http://en.wikipedia.org/wiki/PowerPC */
VIR_ARCH_RISCV32, /* RISC-V 32 LE http://en.wikipedia.org/wiki/RISC-V */
VIR_ARCH_RISCV64, /* RISC-V 64 LE http://en.wikipedia.org/wiki/RISC-V */
VIR_ARCH_S390, /* S390 32 BE http://en.wikipedia.org/wiki/S390 */ VIR_ARCH_S390, /* S390 32 BE http://en.wikipedia.org/wiki/S390 */
VIR_ARCH_S390X, /* S390 64 BE http://en.wikipedia.org/wiki/S390x */ VIR_ARCH_S390X, /* S390 64 BE http://en.wikipedia.org/wiki/S390x */
VIR_ARCH_SH4, /* SuperH4 32 LE http://en.wikipedia.org/wiki/SuperH */ VIR_ARCH_SH4, /* SuperH4 32 LE http://en.wikipedia.org/wiki/SuperH */
VIR_ARCH_SH4EB, /* SuperH4 32 BE http://en.wikipedia.org/wiki/SuperH */ VIR_ARCH_SH4EB, /* SuperH4 32 BE http://en.wikipedia.org/wiki/SuperH */
VIR_ARCH_SPARC, /* Sparc 32 BE http://en.wikipedia.org/wiki/Sparc */ VIR_ARCH_SPARC, /* Sparc 32 BE http://en.wikipedia.org/wiki/Sparc */
VIR_ARCH_SPARC64, /* Sparc 64 BE http://en.wikipedia.org/wiki/Sparc */ VIR_ARCH_SPARC64, /* Sparc 64 BE http://en.wikipedia.org/wiki/Sparc */
VIR_ARCH_UNICORE32, /* UniCore 32 LE http://en.wikipedia.org/wiki/Unicore*/ VIR_ARCH_UNICORE32, /* UniCore 32 LE http://en.wikipedia.org/wiki/Unicore*/
VIR_ARCH_X86_64, /* x86 64 LE http://en.wikipedia.org/wiki/X86 */ VIR_ARCH_X86_64, /* x86 64 LE http://en.wikipedia.org/wiki/X86 */
VIR_ARCH_XTENSA, /* XTensa 32 LE http://en.wikipedia.org/wiki/Xtensa#Processor_Cores */ VIR_ARCH_XTENSA, /* XTensa 32 LE http://en.wikipedia.org/wiki/Xtensa#Processor_Cores */
VIR_ARCH_XTENSAEB, /* XTensa 32 BE http://en.wikipedia.org/wiki/Xtensa#Processor_Cores */ VIR_ARCH_XTENSAEB, /* XTensa 32 BE http://en.wikipedia.org/wiki/Xtensa#Processor_Cores */
@ -87,6 +90,9 @@ typedef enum {
(arch) == VIR_ARCH_ARMV7B ||\ (arch) == VIR_ARCH_ARMV7B ||\
(arch) == VIR_ARCH_AARCH64) (arch) == VIR_ARCH_AARCH64)
# define ARCH_IS_RISCV(arch) ((arch) == VIR_ARCH_RISCV32 ||\
(arch) == VIR_ARCH_RISCV64)
# define ARCH_IS_S390(arch) ((arch) == VIR_ARCH_S390 ||\ # define ARCH_IS_S390(arch) ((arch) == VIR_ARCH_S390 ||\
(arch) == VIR_ARCH_S390X) (arch) == VIR_ARCH_S390X)