cpu: Add SandyBridge-IBRS CPU model

This is a variant of SandyBridge with indirect branch prediction
protection. The only difference between SandyBridge and SandyBridge-IBRS
is the added "spec-ctrl" feature.

The SandyBridge-IBRS model in QEMU is a bit different since SandyBridge
got several additional features since we added it in cpu_map.xml:
    arat, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
This commit is contained in:
Jiri Denemark 2018-01-08 20:53:25 +01:00
parent 2e3b220a87
commit 30b381cfdd

View File

@ -1030,6 +1030,50 @@
<feature name='xsave'/>
</model>
<model name='SandyBridge-IBRS'>
<signature family='6' model='42'/>
<vendor name='Intel'/>
<feature name='aes'/>
<feature name='apic'/>
<feature name='avx'/>
<feature name='clflush'/>
<feature name='cmov'/>
<feature name='cx16'/>
<feature name='cx8'/>
<feature name='de'/>
<feature name='fpu'/>
<feature name='fxsr'/>
<feature name='lahf_lm'/>
<feature name='lm'/>
<feature name='mca'/>
<feature name='mce'/>
<feature name='mmx'/>
<feature name='msr'/>
<feature name='mtrr'/>
<feature name='nx'/>
<feature name='pae'/>
<feature name='pat'/>
<feature name='pclmuldq'/>
<feature name='pge'/>
<feature name='pni'/>
<feature name='popcnt'/>
<feature name='pse'/>
<feature name='pse36'/>
<feature name='rdtscp'/>
<feature name='sep'/>
<feature name='spec-ctrl'/>
<feature name='sse'/>
<feature name='sse2'/>
<feature name='sse4.1'/>
<feature name='sse4.2'/>
<feature name='ssse3'/>
<feature name='syscall'/>
<feature name='tsc'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
<feature name='xsave'/>
</model>
<model name='IvyBridge'>
<signature family='6' model='58'/>
<vendor name='Intel'/>