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cpu: Add Broadwell-noTSX-IBRS CPU model

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This is a variant of Broadwell-noTSX with indirect branch prediction
protection. The only difference between Broadwell-noTSX and
Broadwell-noTSX-IBRS is the added "spec-ctrl" feature.

The Broadwell-noTSX-IBRS model in QEMU is a bit different since
Broadwell-noTSX got several additional features since we added it in
cpu_map.xml:
    abm, arat, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
This commit is contained in:
Jiri Denemark 2018-01-08 20:53:25 +01:00
parent 7f83eefa9e
commit 49bffcb3cc
1 changed files with 58 additions and 0 deletions
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58
src/cpu/cpu_map.xml
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@ -1448,6 +1448,64 @@
<feature name='xsave'/>
</model>
<model name='Broadwell-noTSX-IBRS'>
<signature family='6' model='61'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='adx'/>
<feature name='aes'/>
<feature name='apic'/>
<feature name='avx'/>
<feature name='avx2'/>
<feature name='bmi1'/>
<feature name='bmi2'/>
<feature name='clflush'/>
<feature name='cmov'/>
<feature name='cx16'/>
<feature name='cx8'/>
<feature name='de'/>
<feature name='erms'/>
<feature name='fma'/>
<feature name='fpu'/>
<feature name='fsgsbase'/>
<feature name='fxsr'/>
<feature name='invpcid'/>
<feature name='lahf_lm'/>
<feature name='lm'/>
<feature name='mca'/>
<feature name='mce'/>
<feature name='mmx'/>
<feature name='movbe'/>
<feature name='msr'/>
<feature name='mtrr'/>
<feature name='nx'/>
<feature name='pae'/>
<feature name='pat'/>
<feature name='pcid'/>
<feature name='pclmuldq'/>
<feature name='pge'/>
<feature name='pni'/>
<feature name='popcnt'/>
<feature name='pse'/>
<feature name='pse36'/>
<feature name='rdseed'/>
<feature name='rdtscp'/>
<feature name='sep'/>
<feature name='smap'/>
<feature name='smep'/>
<feature name='spec-ctrl'/>
<feature name='sse'/>
<feature name='sse2'/>
<feature name='sse4.1'/>
<feature name='sse4.2'/>
<feature name='ssse3'/>
<feature name='syscall'/>
<feature name='tsc'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
<feature name='xsave'/>
</model>
<model name='Broadwell'>
<signature family='6' model='61'/>
<vendor name='Intel'/>