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cpu: Remove the verification conditions of the model in the x86 signatures

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The x86ModelParseSignatures function makes an assumption that CPU signature
model equals 0 as an invalid case. While in Hygon processor definition, A1
version (model 0, stepping 1) is mass production version, to support Hygon
Dhyana A1 version, we have removed CPU signature model zero checking condition.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Yingle Hou <houyingle@hygon.cn>
This commit is contained in:
Yingle Hou 2019-12-12 10:58:18 +08:00 committed by Daniel P. Berrangé
parent f411b7ef68
commit 528356f46b
1 changed files with 1 additions and 1 deletions
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src/cpu/cpu_x86.c
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@ -1418,7 +1418,7 @@ x86ModelParseSignatures(virCPUx86ModelPtr model,
}
rc = virXPathUInt("string(@model)", ctxt, &sigModel);
if (rc < 0 || sigModel == 0) {
if (rc < 0) {
virReportError(VIR_ERR_INTERNAL_ERROR,
_("Invalid CPU signature model in model %s"),
model->name);