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util: Add MBA check to virResctrlInfoGetCache

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If we have some membw_info data, then we need to calculate the number
of MBA controllers on the system. The value cannot be obtained from a
direct query to the RDT kernel module, but it is the same as the last
level cache value which is calculated by traversing the cache hierarchy
of host(/sys/bus/cpu/devices/cpuX/cache/).

Signed-off-by: Bing Niu <bing.niu@intel.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
This commit is contained in:
Bing Niu 2018-07-30 11:12:29 +08:00 committed by John Ferlan
parent a24da791b8
commit 5aae2b3968
1 changed files with 14 additions and 0 deletions
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14
src/util/virresctrl.c
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@ -608,6 +608,20 @@ virResctrlInfoGetCache(virResctrlInfoPtr resctrl,
if (virResctrlInfoIsEmpty(resctrl))
return 0;
/* Let's take the opportunity to update the number of last level
* cache. This number of memory bandwidth controller is same with
* last level cache */
if (resctrl->membw_info) {
virResctrlInfoMemBWPtr membw_info = resctrl->membw_info;
if (level > membw_info->last_level_cache) {
membw_info->last_level_cache = level;
membw_info->max_id = 0;
} else if (membw_info->last_level_cache == level) {
membw_info->max_id++;
}
}
if (level >= resctrl->nlevels)
return 0;