conf: new pcie-controller model "pcie-switch-downstream-port"

This controller can be connected only to a port on a pcie-switch-upstream-port. It provides a single hotpluggable port that will accept any PCI or PCIe device, as well as any device requiring a pcie-*-port (the only current example of such a device is the pcie-switch-upstream-port).
2024-07-11 12:25:52 +00:00 · 2015-06-17 15:27:40 -04:00 · 2015-06-17 15:27:40 -04:00 · 76379a6ec1
commit 76379a6ec1
parent ad1748a1aa
8 changed files with 91 additions and 17 deletions
--- a/docs/formatdomain.html.in
+++ b/docs/formatdomain.html.in
@ -3032,11 +3032,12 @@
      PCI controllers have an optional <code>model</code> attribute with
      possible values <code>pci-root</code>, <code>pcie-root</code>,
      <code>pcie-root-port</code>, <code>pci-bridge</code>,
-      <code>dmi-to-pci-bridge</code>, or <code>pcie-switch-upstream-port</code>.
+      <code>dmi-to-pci-bridge</code>, <code>pcie-switch-upstream-port</code>, or
+      <code>pcie-switch-downstream-port</code>.
      (pci-root and pci-bridge <span class="since">since 1.0.5</span>,
      pcie-root and dmi-to-pci-bridge <span class="since">since
-      1.1.2</span>, pcie-root-port and
-      pcie-switch-upstream-port <span class="since">since 1.2.19</span>)
+      1.1.2</span>, pcie-root-port, pcie-switch-upstream-port, and
+      pcie-switch-downstream-port <span class="since">since 1.2.19</span>)
      The root controllers (<code>pci-root</code> and <code>pcie-root</code>)
      have an optional <code>pcihole64</code> element specifying how big
      (in kilobytes, or in the unit specified by <code>pcihole64</code>'s
@ -3083,8 +3084,8 @@
      </dd>
      <dt><code>chassis</code></dt>
      <dd>
-        pcie-root-port controllers can also have
-        a <code>chassis</code> attribute in
+        pcie-root-port and pcie-switch-downstream-port controllers can
+        also have a <code>chassis</code> attribute in
        the <code>&lt;target&gt;</code> subelement, which is used to
        set the controller's "chassis" configuration value, which is
        visible to the virtual machine. If set, chassis must be
@ -3092,8 +3093,9 @@
      </dd>
      <dt><code>port</code></dt>
      <dd>
-        pcie-root-port controllers can also have a <code>port</code>
-        attribute in the <code>&lt;target&gt;</code> subelement, which
+        pcie-root-port and pcie-switch-downstream-port controllers can
+        also have a <code>port</code> attribute in
+        the <code>&lt;target&gt;</code> subelement, which
        is used to set the controller's "port" configuration value,
        which is visible to the virtual machine. If set, port must be
        between 0 and 255.
@ -3146,14 +3148,32 @@
    </p>
    <p>
      Domains with an implicit pcie-root can also add controllers
-      with <code>model='pcie-root-port'</code>. This is a simple type of
-      bridge device that can connect only to one of the 31 slots on
-      the pcie-root bus on the upstream side, and makes a single
-      (PCIe, hotpluggable) port (at slot='0') available on the
-      downstream side. This controller can be used to provide a single
-      slot to later hotplug a PCIe device (but is not itself
-      hotpluggable - it must be in the configuration when the domain
-      is started). (<span class="since">since 1.2.19</span>)
+      with <code>model='pcie-root-port'</code>,
+      <code>model='pcie-switch-upstream-port'</code>,
+      and <code>model='pcie-switch-downstream-port'</code>. pcie-root-port
+      is a simple type of bridge device that can connect only to one
+      of the 31 slots on the pcie-root bus on its upstream side, and
+      makes a single (PCIe, hotpluggable) port available on the
+      downstream side (at slot='0'). pcie-root-port can be used to
+      provide a single slot to later hotplug a PCIe device (but is not
+      itself hotpluggable - it must be in the configuration when the
+      domain is started).
+      (<span class="since">since 1.2.19</span>)
+    </p>
+    <p>
+      pcie-switch-upstream-port is a more flexible (but also more
+      complex) device that can only plug into a pcie-root-port or
+      pcie-switch-downstream-port on the upstream side (and only
+      before the domain is started - it is not hot-pluggable), and
+      provides 32 ports on the downstream side (slot='0' - slot='31')
+      that accept only pcie-switch-downstream-port devices; each
+      pcie-switch-downstream-port device can only plug into a
+      pcie-switch-upstream-port on its upstream side (again, not
+      hot-pluggable), and on its downstream side provides a single
+      hotpluggable pcie port that can accept any standard pci or pcie
+      device (or another pcie-switch-upstream-port), i.e. identical in
+      function to a pcie-root-port.  (<span class="since">since
+      1.2.19</span>)
    </p>
 <pre>
  ...
--- a/docs/schemas/domaincommon.rng
+++ b/docs/schemas/domaincommon.rng
@ -1743,6 +1743,8 @@
                    <value>ioh3420</value>
                    <!-- implementations of 'pcie-switch-upstream-port' -->
                    <value>x3130-upstream</value>
+                    <!-- implementations of 'pcie-switch-downstream-port' -->
+                    <value>xio3130-downstream</value>
                  </choice>
                </attribute>
                <empty/>
@ -1790,6 +1792,7 @@
                    <value>dmi-to-pci-bridge</value>
                    <value>pcie-root-port</value>
                    <value>pcie-switch-upstream-port</value>
+                    <value>pcie-switch-downstream-port</value>
                  </choice>
                </attribute>
              </group>
--- a/src/conf/domain_addr.c
+++ b/src/conf/domain_addr.c
@ -197,6 +197,7 @@ virDomainPCIAddressBusSetModel(virDomainPCIAddressBusPtr bus,
        bus->maxSlot = VIR_PCI_ADDRESS_SLOT_LAST;
        break;
    case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT:
+    case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT:
        /* provides one slot which is pcie, can be used by devices
         * that must connect to some type of "pcie-*-port", and
         * is hotpluggable
--- a/src/conf/domain_conf.c
+++ b/src/conf/domain_conf.c
@ -326,7 +326,8 @@ VIR_ENUM_IMPL(virDomainControllerModelPCI, VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST,
              "pci-bridge",
              "dmi-to-pci-bridge",
              "pcie-root-port",
-              "pcie-switch-upstream-port")
+              "pcie-switch-upstream-port",
+              "pcie-switch-downstream-port")

 VIR_ENUM_IMPL(virDomainControllerPCIModelName,
              VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_LAST,
@ -334,7 +335,8 @@ VIR_ENUM_IMPL(virDomainControllerPCIModelName,
              "pci-bridge",
              "i82801b11-bridge",
              "ioh3420",
-              "x3130-upstream")
+              "x3130-upstream",
+              "xio3130-downstream")

 VIR_ENUM_IMPL(virDomainControllerModelSCSI, VIR_DOMAIN_CONTROLLER_MODEL_SCSI_LAST,
              "auto",
--- a/src/conf/domain_conf.h
+++ b/src/conf/domain_conf.h
@ -754,6 +754,7 @@ typedef enum {
    VIR_DOMAIN_CONTROLLER_MODEL_DMI_TO_PCI_BRIDGE,
    VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT_PORT,
    VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_UPSTREAM_PORT,
+    VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT,

    VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST
 } virDomainControllerModelPCI;
@ -764,6 +765,7 @@ typedef enum {
    VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_I82801B11_BRIDGE,
    VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_IOH3420,
    VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM,
+    VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_XIO3130_DOWNSTREAM,

    VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_LAST
 } virDomainControllerPCIModelName;
--- a/src/qemu/qemu_command.c
+++ b/src/qemu/qemu_command.c
@ -2307,6 +2307,7 @@ qemuDomainAssignPCIAddresses(virDomainDefPtr def,
                    if (options->modelName == VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_NONE)
                        options->modelName = VIR_DOMAIN_CONTROLLER_PCI_MODEL_NAME_X3130_UPSTREAM;
                    break;
+                case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_SWITCH_DOWNSTREAM_PORT:
                case VIR_DOMAIN_CONTROLLER_MODEL_PCI_ROOT:
                case VIR_DOMAIN_CONTROLLER_MODEL_PCIE_ROOT:
                case VIR_DOMAIN_CONTROLLER_MODEL_PCI_LAST:
--- a/tests/qemuxml2argvdata/qemuxml2argv-pcie-switch-downstream-port.xml
+++ b/tests/qemuxml2argvdata/qemuxml2argv-pcie-switch-downstream-port.xml
@ -0,0 +1,44 @@
+<domain type='qemu'>
+  <name>q35-test</name>
+  <uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid>
+  <memory unit='KiB'>2097152</memory>
+  <currentMemory unit='KiB'>2097152</currentMemory>
+  <vcpu placement='static' cpuset='0-1'>2</vcpu>
+  <os>
+    <type arch='x86_64' machine='q35'>hvm</type>
+    <boot dev='hd'/>
+  </os>
+  <clock offset='utc'/>
+  <on_poweroff>destroy</on_poweroff>
+  <on_reboot>restart</on_reboot>
+  <on_crash>destroy</on_crash>
+  <devices>
+    <emulator>/usr/libexec/qemu-kvm</emulator>
+    <disk type='block' device='disk'>
+      <source dev='/dev/HostVG/QEMUGuest1'/>
+      <target dev='sda' bus='sata'/>
+      <address type='drive' controller='0' bus='0' target='0' unit='0'/>
+    </disk>
+    <controller type='pci' index='0' model='pcie-root'/>
+    <controller type='pci' index='1' model='dmi-to-pci-bridge'/>
+    <controller type='pci' index='2' model='pci-bridge'/>
+    <controller type='pci' index='3' model='pcie-root-port'/>
+    <controller type='pci' index='4' model='pcie-switch-upstream-port'/>
+    <controller type='pci' index='5' model='pcie-switch-downstream-port'/>
+    <controller type='pci' index='6' model='pcie-switch-downstream-port'/>
+    <controller type='pci' index='7' model='pcie-switch-downstream-port'/>
+    <controller type='pci' index='8' model='pcie-switch-downstream-port'>
+      <model name='xio3130-downstream'/>
+      <target chassis='30' port='0x27'/>
+    </controller>
+    <controller type='pci' index='9' model='pcie-switch-upstream-port'/>
+    <controller type='pci' index='10' model='pcie-switch-downstream-port'/>
+    <controller type='pci' index='11' model='pcie-switch-downstream-port'/>
+    <controller type='pci' index='12' model='pcie-switch-downstream-port'/>
+    <controller type='sata' index='0'/>
+    <video>
+      <model type='qxl' ram='65536' vram='32768' vgamem='8192' heads='1'/>
+    </video>
+    <memballoon model='none'/>
+  </devices>
+</domain>
--- a/tests/qemuxml2xmltest.c
+++ b/tests/qemuxml2xmltest.c
@ -570,6 +570,7 @@ mymain(void)
    DO_TEST("pcie-root-port");
    DO_TEST("pcie-root-port-too-many");
    DO_TEST("pcie-switch-upstream-port");
+    DO_TEST("pcie-switch-downstream-port");

    DO_TEST("hostdev-scsi-lsi");
    DO_TEST("hostdev-scsi-virtio-scsi");