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cpu_x86: Add full support for ecx_in CPUID parameter
This patch makes our CPUID handling code up-to-date with the current specification found in Intel® 64 and IA-32 Architectures Developer's Manual: Vol. 2A http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
This commit is contained in:
Jiri Denemark
parent
f0fd7ae122
commit
76561efedd
@ -289,7 +289,6 @@
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</feature>
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<!-- cpuid function 0x7 ecx 0x0 features -->
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<!-- We support only ecx 0x0 now as it's done by a workaround -->
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<feature name='fsgsbase'>
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<cpuid eax_in='0x00000007' ebx='0x00000001'/>
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</feature>
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@ -259,7 +259,7 @@ virCPUx86CPUIDSorter(const void *a, const void *b)
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}
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/* skips all zero CPUID leafs */
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/* skips all zero CPUID leaves */
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static virCPUx86CPUID *
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x86DataCpuidNext(virCPUx86DataIteratorPtr iterator)
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{
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@ -1891,21 +1891,284 @@ cpuidCall(virCPUx86CPUID *cpuid)
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}
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/* Leaf 0x04: deterministic cache parameters
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*
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* Sub leaf n+1 is invalid if eax[4:0] in sub leaf n equals 0.
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*/
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static int
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cpuidSetLeaf4(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0)
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{
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virCPUx86CPUID cpuid = *subLeaf0;
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if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
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return -1;
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while (cpuid.eax & 0x1f) {
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cpuid.ecx_in++;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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}
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return 0;
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}
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/* Leaf 0x07: structured extended feature flags enumeration
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*
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* Sub leaf n is invalid if n > eax in sub leaf 0.
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*/
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static int
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cpuidSetLeaf7(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0)
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{
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virCPUx86CPUID cpuid = { .eax_in = 0x7 };
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uint32_t sub;
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if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
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return -1;
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for (sub = 1; sub <= subLeaf0->eax; sub++) {
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cpuid.ecx_in = sub;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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}
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return 0;
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}
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/* Leaf 0x0b: extended topology enumeration
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*
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* Sub leaf n is invalid if it returns 0 in ecx[15:8].
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* Sub leaf n+1 is invalid if sub leaf n is invalid.
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* Some output values do not depend on ecx, thus sub leaf 0 provides
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* meaningful data even if it was (theoretically) considered invalid.
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*/
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static int
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cpuidSetLeafB(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0)
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{
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virCPUx86CPUID cpuid = *subLeaf0;
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while (cpuid.ecx & 0xff00) {
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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cpuid.ecx_in++;
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cpuidCall(&cpuid);
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}
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return 0;
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}
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/* Leaf 0x0d: processor extended state enumeration
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*
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* Sub leaves 0 and 1 are valid.
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* Sub leaf n (2 <= n < 32) is invalid if eax[n] from sub leaf 0 is not set
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* and ecx[n] from sub leaf 1 is not set.
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* Sub leaf n (32 <= n < 64) is invalid if edx[n-32] from sub leaf 0 is not set
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* and edx[n-32] from sub leaf 1 is not set.
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*/
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static int
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cpuidSetLeafD(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0)
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{
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virCPUx86CPUID cpuid = { .eax_in = 0xd };
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virCPUx86CPUID sub0;
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virCPUx86CPUID sub1;
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uint32_t sub;
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if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
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return -1;
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cpuid.ecx_in = 1;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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sub0 = *subLeaf0;
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sub1 = cpuid;
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for (sub = 2; sub < 64; sub++) {
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if (sub < 32 &&
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!(sub0.eax & (1 << sub)) &&
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!(sub1.ecx & (1 << sub)))
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continue;
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if (sub >= 32 &&
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!(sub0.edx & (1 << (sub - 32))) &&
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!(sub1.edx & (1 << (sub - 32))))
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continue;
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cpuid.ecx_in = sub;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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}
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return 0;
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}
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/* Leaf 0x0f: L3 cached RDT monitoring capability enumeration
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* Leaf 0x10: RDT allocation enumeration
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*
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* res reports valid resource identification (ResID) starting at bit 1.
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* Values associated with each valid ResID are reported by ResID sub leaf.
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*
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* 0x0f: Sub leaf n is valid if edx[n] (= res[ResID]) from sub leaf 0 is set.
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* 0x10: Sub leaf n is valid if ebx[n] (= res[ResID]) from sub leaf 0 is set.
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*/
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static int
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cpuidSetLeafResID(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0,
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uint32_t res)
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{
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virCPUx86CPUID cpuid = { .eax_in = subLeaf0->eax_in };
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uint32_t sub;
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if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
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return -1;
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for (sub = 1; sub < 32; sub++) {
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if (!(res & (1 << sub)))
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continue;
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cpuid.ecx_in = sub;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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}
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return 0;
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}
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/* Leaf 0x12: SGX capability enumeration
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*
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* Sub leaves 0 and 1 is supported if ebx[2] from leaf 0x7 (SGX) is set.
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* Sub leaves n >= 2 are valid as long as eax[3:0] != 0.
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*/
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static int
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cpuidSetLeaf12(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0)
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{
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virCPUx86CPUID cpuid = { .eax_in = 0x7 };
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virCPUx86CPUID *cpuid7;
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if (!(cpuid7 = x86DataCpuid(data, &cpuid)) ||
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!(cpuid7->ebx & (1 << 2)))
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return 0;
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if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
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return -1;
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cpuid.eax_in = 0x12;
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cpuid.ecx_in = 1;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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cpuid.ecx_in = 2;
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cpuidCall(&cpuid);
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while (cpuid.eax & 0xf) {
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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cpuid.ecx_in++;
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cpuidCall(&cpuid);
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}
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return 0;
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}
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/* Leaf 0x14: processor trace enumeration
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*
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* Sub leaf 0 reports the maximum supported sub leaf in eax.
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*/
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static int
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cpuidSetLeaf14(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0)
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{
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virCPUx86CPUID cpuid = { .eax_in = 0x14 };
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uint32_t sub;
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if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
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return -1;
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for (sub = 1; sub <= subLeaf0->eax; sub++) {
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cpuid.ecx_in = sub;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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}
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return 0;
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}
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/* Leaf 0x17: SOC Vendor
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*
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* Sub leaf 0 is valid if eax >= 3.
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* Sub leaf 0 reports the maximum supported sub leaf in eax.
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*/
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static int
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cpuidSetLeaf17(virCPUx86Data *data,
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virCPUx86CPUID *subLeaf0)
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{
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virCPUx86CPUID cpuid = { .eax_in = 0x17 };
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uint32_t sub;
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if (subLeaf0->eax < 3)
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return 0;
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if (virCPUx86DataAddCPUID(data, subLeaf0) < 0)
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return -1;
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for (sub = 1; sub <= subLeaf0->eax; sub++) {
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cpuid.ecx_in = sub;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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return -1;
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}
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return 0;
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}
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static int
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cpuidSet(uint32_t base, virCPUx86Data *data)
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{
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int rc;
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uint32_t max;
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uint32_t i;
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uint32_t leaf;
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virCPUx86CPUID cpuid = { .eax_in = base };
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cpuidCall(&cpuid);
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max = cpuid.eax;
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for (i = base; i <= max; i++) {
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cpuid.eax_in = i;
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for (leaf = base; leaf <= max; leaf++) {
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cpuid.eax_in = leaf;
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cpuid.ecx_in = 0;
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cpuidCall(&cpuid);
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if (virCPUx86DataAddCPUID(data, &cpuid) < 0)
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/* Handle CPUID leaves that depend on previously queried bits or
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* which provide additional sub leaves for ecx_in > 0
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*/
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if (leaf == 0x4)
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rc = cpuidSetLeaf4(data, &cpuid);
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else if (leaf == 0x7)
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rc = cpuidSetLeaf7(data, &cpuid);
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else if (leaf == 0xb)
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rc = cpuidSetLeafB(data, &cpuid);
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else if (leaf == 0xd)
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rc = cpuidSetLeafD(data, &cpuid);
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else if (leaf == 0xf)
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rc = cpuidSetLeafResID(data, &cpuid, cpuid.edx);
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else if (leaf == 0x10)
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rc = cpuidSetLeafResID(data, &cpuid, cpuid.ebx);
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else if (leaf == 0x12)
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rc = cpuidSetLeaf12(data, &cpuid);
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else if (leaf == 0x14)
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rc = cpuidSetLeaf14(data, &cpuid);
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else if (leaf == 0x17)
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rc = cpuidSetLeaf17(data, &cpuid);
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else
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rc = virCPUx86DataAddCPUID(data, &cpuid);
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if (rc < 0)
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return -1;
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}
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