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hostcpu: add support for reporting die_id in NUMA topology

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Update the host CPU code to report the die_id in the NUMA topology
capabilities. On systems with multiple dies, this fixes the bug
where CPU cores can't be distinguished:

 <cpus num='12'>
   <cpu id='0' socket_id='0' core_id='0' siblings='0'/>
   <cpu id='1' socket_id='0' core_id='1' siblings='1'/>
   <cpu id='2' socket_id='0' core_id='0' siblings='2'/>
   <cpu id='3' socket_id='0' core_id='1' siblings='3'/>
 </cpus>

Notice how core_id is repeated within the scope of the same socket_id.

It now reports

 <cpus num='12'>
   <cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
   <cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
   <cpu id='2' socket_id='0' die_id='1' core_id='0' siblings='2'/>
   <cpu id='3' socket_id='0' die_id='1' core_id='1' siblings='3'/>
 </cpus>

So core_id is now unique within a (socket_id, die_id) pair.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
This commit is contained in:
Daniel P. Berrangé 2019-12-16 18:10:29 +00:00
parent 4cf8dd0c57
commit 7b79ee2f78
15 changed files with 116 additions and 91 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
docs/schemas/capability.rng
View File

@ -265,6 +265,9 @@
<attribute name='socket_id'>
<ref name='unsignedInt'/>
</attribute>
<attribute name='die_id'>
<ref name='unsignedInt'/>
</attribute>
<attribute name='core_id'>
<ref name='unsignedInt'/>
</attribute>

5
src/conf/capabilities.c
View File

@ -874,8 +874,9 @@ virCapabilitiesHostNUMAFormat(virCapsHostNUMAPtr caps,
return -1;
virBufferAsprintf(buf,
" socket_id='%d' core_id='%d' siblings='%s'",
" socket_id='%d' die_id='%d' core_id='%d' siblings='%s'",
cell->cpus[j].socket_id,
cell->cpus[j].die_id,
cell->cpus[j].core_id,
siblings);
VIR_FREE(siblings);
@ -1463,6 +1464,7 @@ virCapabilitiesFillCPUInfo(int cpu_id G_GNUC_UNUSED,
cpu->id = cpu_id;
if (virHostCPUGetSocket(cpu_id, &cpu->socket_id) < 0 ||
virHostCPUGetDie(cpu_id, &cpu->die_id) < 0 ||
virHostCPUGetCore(cpu_id, &cpu->core_id) < 0)
return -1;
@ -1591,6 +1593,7 @@ virCapabilitiesHostNUMAInitFake(virCapsHostNUMAPtr caps)
goto error;
if (tmp) {
cpus[cid].id = id;
cpus[cid].die_id = 0;
cpus[cid].socket_id = s;
cpus[cid].core_id = c;
if (!(cpus[cid].siblings = virBitmapNew(ncpus)))

1
src/conf/capabilities.h
View File

@ -88,6 +88,7 @@ struct _virCapsGuest {
struct _virCapsHostNUMACellCPU {
unsigned int id;
unsigned int socket_id;
unsigned int die_id;
unsigned int core_id;
virBitmapPtr siblings;
};

1
src/libvirt_linux.syms
View File

@ -4,6 +4,7 @@
# util/virhostcpu.h
virHostCPUGetCore;
virHostCPUGetDie;
virHostCPUGetInfoPopulateLinux;
virHostCPUGetSiblingsList;
virHostCPUGetSocket;

16
src/util/virhostcpu.c
View File

@ -218,6 +218,22 @@ virHostCPUGetSocket(unsigned int cpu, unsigned int *socket)
return 0;
}
int
virHostCPUGetDie(unsigned int cpu, unsigned int *die)
{
int ret = virFileReadValueUint(die,
"%s/cpu/cpu%u/topology/die_id",
SYSFS_SYSTEM_PATH, cpu);
/* If the file is not there, it's 0 */
if (ret == -2)
*die = 0;
else if (ret < 0)
return -1;
return 0;
}
int
virHostCPUGetCore(unsigned int cpu, unsigned int *core)
{

1
src/util/virhostcpu.h
View File

@ -65,6 +65,7 @@ int virHostCPUStatsAssign(virNodeCPUStatsPtr param,
#ifdef __linux__
int virHostCPUGetSocket(unsigned int cpu, unsigned int *socket);
int virHostCPUGetDie(unsigned int cpu, unsigned int *die);
int virHostCPUGetCore(unsigned int cpu, unsigned int *core);
virBitmapPtr virHostCPUGetSiblingsList(unsigned int cpu);

32
tests/vircaps2xmldata/vircaps-aarch64-basic.xml
View File

@ -16,10 +16,10 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='4'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3'/>
</cpus>
</cell>
<cell id='1'>
@ -28,10 +28,10 @@
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='4'>
<cpu id='4' socket_id='1' core_id='4' siblings='4'/>
<cpu id='5' socket_id='1' core_id='5' siblings='5'/>
<cpu id='6' socket_id='1' core_id='6' siblings='6'/>
<cpu id='7' socket_id='1' core_id='7' siblings='7'/>
<cpu id='4' socket_id='1' die_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='1' die_id='0' core_id='5' siblings='5'/>
<cpu id='6' socket_id='1' die_id='0' core_id='6' siblings='6'/>
<cpu id='7' socket_id='1' die_id='0' core_id='7' siblings='7'/>
</cpus>
</cell>
<cell id='2'>
@ -40,10 +40,10 @@
<pages unit='KiB' size='2048'>8192</pages>
<pages unit='KiB' size='1048576'>10240</pages>
<cpus num='4'>
<cpu id='8' socket_id='2' core_id='8' siblings='8'/>
<cpu id='9' socket_id='2' core_id='9' siblings='9'/>
<cpu id='10' socket_id='2' core_id='10' siblings='10'/>
<cpu id='11' socket_id='2' core_id='11' siblings='11'/>
<cpu id='8' socket_id='2' die_id='0' core_id='8' siblings='8'/>
<cpu id='9' socket_id='2' die_id='0' core_id='9' siblings='9'/>
<cpu id='10' socket_id='2' die_id='0' core_id='10' siblings='10'/>
<cpu id='11' socket_id='2' die_id='0' core_id='11' siblings='11'/>
</cpus>
</cell>
<cell id='3'>
@ -52,10 +52,10 @@
<pages unit='KiB' size='2048'>10240</pages>
<pages unit='KiB' size='1048576'>12288</pages>
<cpus num='4'>
<cpu id='12' socket_id='3' core_id='12' siblings='12'/>
<cpu id='13' socket_id='3' core_id='13' siblings='13'/>
<cpu id='14' socket_id='3' core_id='14' siblings='14'/>
<cpu id='15' socket_id='3' core_id='15' siblings='15'/>
<cpu id='12' socket_id='3' die_id='0' core_id='12' siblings='12'/>
<cpu id='13' socket_id='3' die_id='0' core_id='13' siblings='13'/>
<cpu id='14' socket_id='3' die_id='0' core_id='14' siblings='14'/>
<cpu id='15' socket_id='3' die_id='0' core_id='15' siblings='15'/>
</cpus>
</cell>
</cells>

32
tests/vircaps2xmldata/vircaps-x86_64-basic.xml
View File

@ -14,10 +14,10 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='4'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3'/>
</cpus>
</cell>
<cell id='1'>
@ -26,10 +26,10 @@
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='4'>
<cpu id='4' socket_id='1' core_id='4' siblings='4'/>
<cpu id='5' socket_id='1' core_id='5' siblings='5'/>
<cpu id='6' socket_id='1' core_id='6' siblings='6'/>
<cpu id='7' socket_id='1' core_id='7' siblings='7'/>
<cpu id='4' socket_id='1' die_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='1' die_id='0' core_id='5' siblings='5'/>
<cpu id='6' socket_id='1' die_id='0' core_id='6' siblings='6'/>
<cpu id='7' socket_id='1' die_id='0' core_id='7' siblings='7'/>
</cpus>
</cell>
<cell id='2'>
@ -38,10 +38,10 @@
<pages unit='KiB' size='2048'>8192</pages>
<pages unit='KiB' size='1048576'>10240</pages>
<cpus num='4'>
<cpu id='8' socket_id='2' core_id='8' siblings='8'/>
<cpu id='9' socket_id='2' core_id='9' siblings='9'/>
<cpu id='10' socket_id='2' core_id='10' siblings='10'/>
<cpu id='11' socket_id='2' core_id='11' siblings='11'/>
<cpu id='8' socket_id='2' die_id='0' core_id='8' siblings='8'/>
<cpu id='9' socket_id='2' die_id='0' core_id='9' siblings='9'/>
<cpu id='10' socket_id='2' die_id='0' core_id='10' siblings='10'/>
<cpu id='11' socket_id='2' die_id='0' core_id='11' siblings='11'/>
</cpus>
</cell>
<cell id='3'>
@ -50,10 +50,10 @@
<pages unit='KiB' size='2048'>10240</pages>
<pages unit='KiB' size='1048576'>12288</pages>
<cpus num='4'>
<cpu id='12' socket_id='3' core_id='12' siblings='12'/>
<cpu id='13' socket_id='3' core_id='13' siblings='13'/>
<cpu id='14' socket_id='3' core_id='14' siblings='14'/>
<cpu id='15' socket_id='3' core_id='15' siblings='15'/>
<cpu id='12' socket_id='3' die_id='0' core_id='12' siblings='12'/>
<cpu id='13' socket_id='3' die_id='0' core_id='13' siblings='13'/>
<cpu id='14' socket_id='3' die_id='0' core_id='14' siblings='14'/>
<cpu id='15' socket_id='3' die_id='0' core_id='15' siblings='15'/>
</cpus>
</cell>
</cells>

16
tests/vircaps2xmldata/vircaps-x86_64-caches.xml
View File

@ -17,14 +17,14 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='8'>
<cpu id='0' socket_id='0' core_id='0' siblings='0,4'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1,5'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2,6'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3,7'/>
<cpu id='4' socket_id='0' core_id='0' siblings='0,4'/>
<cpu id='5' socket_id='0' core_id='1' siblings='1,5'/>
<cpu id='6' socket_id='0' core_id='2' siblings='2,6'/>
<cpu id='7' socket_id='0' core_id='3' siblings='3,7'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0,4'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1,5'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2,6'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3,7'/>
<cpu id='4' socket_id='0' die_id='0' core_id='0' siblings='0,4'/>
<cpu id='5' socket_id='0' die_id='0' core_id='1' siblings='1,5'/>
<cpu id='6' socket_id='0' die_id='0' core_id='2' siblings='2,6'/>
<cpu id='7' socket_id='0' die_id='0' core_id='3' siblings='3,7'/>
</cpus>
</cell>
</cells>

24
tests/vircaps2xmldata/vircaps-x86_64-resctrl-cdp.xml
View File

@ -17,12 +17,12 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='6'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' core_id='5' siblings='5'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' die_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' die_id='0' core_id='5' siblings='5'/>
</cpus>
</cell>
<cell id='1'>
@ -31,12 +31,12 @@
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='6'>
<cpu id='6' socket_id='1' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' core_id='5' siblings='11'/>
<cpu id='6' socket_id='1' die_id='0' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' die_id='0' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' die_id='0' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' die_id='0' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' die_id='0' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' die_id='0' core_id='5' siblings='11'/>
</cpus>
</cell>
</cells>

24
tests/vircaps2xmldata/vircaps-x86_64-resctrl-cmt.xml
View File

@ -17,12 +17,12 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='6'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' core_id='5' siblings='5'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' die_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' die_id='0' core_id='5' siblings='5'/>
</cpus>
</cell>
<cell id='1'>
@ -31,12 +31,12 @@
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='6'>
<cpu id='6' socket_id='1' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' core_id='5' siblings='11'/>
<cpu id='6' socket_id='1' die_id='0' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' die_id='0' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' die_id='0' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' die_id='0' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' die_id='0' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' die_id='0' core_id='5' siblings='11'/>
</cpus>
</cell>
</cells>

24
tests/vircaps2xmldata/vircaps-x86_64-resctrl-fake-feature.xml
View File

@ -17,12 +17,12 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='6'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' core_id='5' siblings='5'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' die_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' die_id='0' core_id='5' siblings='5'/>
</cpus>
</cell>
<cell id='1'>
@ -31,12 +31,12 @@
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='6'>
<cpu id='6' socket_id='1' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' core_id='5' siblings='11'/>
<cpu id='6' socket_id='1' die_id='0' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' die_id='0' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' die_id='0' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' die_id='0' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' die_id='0' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' die_id='0' core_id='5' siblings='11'/>
</cpus>
</cell>
</cells>

2
tests/vircaps2xmldata/vircaps-x86_64-resctrl-skx-twocaches.xml
View File

@ -17,7 +17,7 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='1'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
</cpus>
</cell>
</cells>

2
tests/vircaps2xmldata/vircaps-x86_64-resctrl-skx.xml
View File

@ -17,7 +17,7 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='1'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
</cpus>
</cell>
</cells>

24
tests/vircaps2xmldata/vircaps-x86_64-resctrl.xml
View File

@ -17,12 +17,12 @@
<pages unit='KiB' size='2048'>4096</pages>
<pages unit='KiB' size='1048576'>6144</pages>
<cpus num='6'>
<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' core_id='5' siblings='5'/>
<cpu id='0' socket_id='0' die_id='0' core_id='0' siblings='0'/>
<cpu id='1' socket_id='0' die_id='0' core_id='1' siblings='1'/>
<cpu id='2' socket_id='0' die_id='0' core_id='2' siblings='2'/>
<cpu id='3' socket_id='0' die_id='0' core_id='3' siblings='3'/>
<cpu id='4' socket_id='0' die_id='0' core_id='4' siblings='4'/>
<cpu id='5' socket_id='0' die_id='0' core_id='5' siblings='5'/>
</cpus>
</cell>
<cell id='1'>
@ -31,12 +31,12 @@
<pages unit='KiB' size='2048'>6144</pages>
<pages unit='KiB' size='1048576'>8192</pages>
<cpus num='6'>
<cpu id='6' socket_id='1' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' core_id='5' siblings='11'/>
<cpu id='6' socket_id='1' die_id='0' core_id='0' siblings='6'/>
<cpu id='7' socket_id='1' die_id='0' core_id='1' siblings='7'/>
<cpu id='8' socket_id='1' die_id='0' core_id='2' siblings='8'/>
<cpu id='9' socket_id='1' die_id='0' core_id='3' siblings='9'/>
<cpu id='10' socket_id='1' die_id='0' core_id='4' siblings='10'/>
<cpu id='11' socket_id='1' die_id='0' core_id='5' siblings='11'/>
</cpus>
</cell>
</cells>