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cpu: Add Broadwell-IBRS CPU model

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This is a variant of Broadwell with indirect branch prediction
protection. The only difference between Broadwell and Broadwell-IBRS is
the added "spec-ctrl" feature.

The Broadwell-IBRS model in QEMU is a bit different since Broadwell got
several additional features since we added it in cpu_map.xml:
    abm, arat, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
This commit is contained in:
Jiri Denemark 2018-01-09 21:36:28 +01:00
parent 49bffcb3cc
commit 7bb4ce9761
4 changed files with 63 additions and 6 deletions
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60
src/cpu/cpu_map.xml
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@ -1565,6 +1565,66 @@
<feature name='xsave'/>
</model>
<model name='Broadwell-IBRS'>
<signature family='6' model='61'/>
<vendor name='Intel'/>
<feature name='3dnowprefetch'/>
<feature name='adx'/>
<feature name='aes'/>
<feature name='apic'/>
<feature name='avx'/>
<feature name='avx2'/>
<feature name='bmi1'/>
<feature name='bmi2'/>
<feature name='clflush'/>
<feature name='cmov'/>
<feature name='cx16'/>
<feature name='cx8'/>
<feature name='de'/>
<feature name='erms'/>
<feature name='fma'/>
<feature name='fpu'/>
<feature name='fsgsbase'/>
<feature name='fxsr'/>
<feature name='hle'/>
<feature name='invpcid'/>
<feature name='lahf_lm'/>
<feature name='lm'/>
<feature name='mca'/>
<feature name='mce'/>
<feature name='mmx'/>
<feature name='movbe'/>
<feature name='msr'/>
<feature name='mtrr'/>
<feature name='nx'/>
<feature name='pae'/>
<feature name='pat'/>
<feature name='pcid'/>
<feature name='pclmuldq'/>
<feature name='pge'/>
<feature name='pni'/>
<feature name='popcnt'/>
<feature name='pse'/>
<feature name='pse36'/>
<feature name='rdseed'/>
<feature name='rdtscp'/>
<feature name='rtm'/>
<feature name='sep'/>
<feature name='smap'/>
<feature name='smep'/>
<feature name='spec-ctrl'/>
<feature name='sse'/>
<feature name='sse2'/>
<feature name='sse4.1'/>
<feature name='sse4.2'/>
<feature name='ssse3'/>
<feature name='syscall'/>
<feature name='tsc'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
<feature name='xsave'/>
</model>
<model name='Skylake-Client'>
<signature family='6' model='94'/>
<vendor name='Intel'/>

3
tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-guest.xml
View File

@ -1,5 +1,5 @@
<cpu mode='custom' match='exact'>
<model fallback='forbid'>Broadwell</model>
<model fallback='forbid'>Broadwell-IBRS</model>
<vendor>Intel</vendor>
<feature policy='require' name='vme'/>
<feature policy='require' name='ds'/>
@ -22,7 +22,6 @@
<feature policy='require' name='rdrand'/>
<feature policy='require' name='arat'/>
<feature policy='require' name='tsc_adjust'/>
<feature policy='require' name='spec-ctrl'/>
<feature policy='require' name='xsaveopt'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='abm'/>

3
tests/cputestdata/x86_64-cpuid-Core-i7-5600U-ibrs-host.xml
View File

@ -1,6 +1,6 @@
<cpu>
<arch>x86_64</arch>
<model>Broadwell</model>
<model>Broadwell-IBRS</model>
<vendor>Intel</vendor>
<feature name='vme'/>
<feature name='ds'/>
@ -23,7 +23,6 @@
<feature name='rdrand'/>
<feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='spec-ctrl'/>
<feature name='xsaveopt'/>
<feature name='pdpe1gb'/>
<feature name='abm'/>

3
tests/cputestdata/x86_64-cpuid-Xeon-E5-2623-v4-host.xml
View File

@ -1,6 +1,6 @@
<cpu>
<arch>x86_64</arch>
<model>Broadwell</model>
<model>Broadwell-IBRS</model>
<vendor>Intel</vendor>
<feature name='vme'/>
<feature name='ds'/>
@ -25,7 +25,6 @@
<feature name='arat'/>
<feature name='tsc_adjust'/>
<feature name='cmt'/>
<feature name='spec-ctrl'/>
<feature name='xsaveopt'/>
<feature name='mbm_total'/>
<feature name='mbm_local'/>