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tests: Enhance vircaps2xml test
Instead of generating all of the capabilities, let's test more of our code by probing sysfs data. This test needs quite some mocking for now, but it paves the road for more future enhancements (hugepages probing, for example). Signed-off-by: Martin Kletzander <mkletzan@redhat.com>
This commit is contained in:
Martin Kletzander
parent
9368095bb8
commit
ad589e1f52
64
tests/vircaps2xmldata/vircaps-aarch64-basic.xml
Normal file
64
tests/vircaps2xmldata/vircaps-aarch64-basic.xml
Normal file
@ -0,0 +1,64 @@
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<capabilities>
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<host>
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<cpu>
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<arch>aarch64</arch>
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</cpu>
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<power_management/>
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<migration_features>
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</migration_features>
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<topology>
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<cells num='4'>
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<cell id='0'>
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<memory unit='KiB'>1048576</memory>
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<pages unit='KiB' size='4'>2048</pages>
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<pages unit='KiB' size='2048'>4096</pages>
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<pages unit='KiB' size='1048576'>6144</pages>
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<cpus num='4'>
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<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
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<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
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<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
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<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
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</cpus>
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</cell>
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<cell id='1'>
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<memory unit='KiB'>2097152</memory>
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<pages unit='KiB' size='4'>4096</pages>
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<pages unit='KiB' size='2048'>6144</pages>
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<pages unit='KiB' size='1048576'>8192</pages>
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<cpus num='4'>
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<cpu id='4' socket_id='1' core_id='4' siblings='4'/>
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<cpu id='5' socket_id='1' core_id='5' siblings='5'/>
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<cpu id='6' socket_id='1' core_id='6' siblings='6'/>
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<cpu id='7' socket_id='1' core_id='7' siblings='7'/>
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</cpus>
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</cell>
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<cell id='2'>
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<memory unit='KiB'>3145728</memory>
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<pages unit='KiB' size='4'>6144</pages>
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<pages unit='KiB' size='2048'>8192</pages>
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<pages unit='KiB' size='1048576'>10240</pages>
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<cpus num='4'>
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<cpu id='8' socket_id='2' core_id='8' siblings='8'/>
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<cpu id='9' socket_id='2' core_id='9' siblings='9'/>
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<cpu id='10' socket_id='2' core_id='10' siblings='10'/>
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<cpu id='11' socket_id='2' core_id='11' siblings='11'/>
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</cpus>
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</cell>
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<cell id='3'>
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<memory unit='KiB'>4194304</memory>
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<pages unit='KiB' size='4'>8192</pages>
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<pages unit='KiB' size='2048'>10240</pages>
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<pages unit='KiB' size='1048576'>12288</pages>
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<cpus num='4'>
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<cpu id='12' socket_id='3' core_id='12' siblings='12'/>
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<cpu id='13' socket_id='3' core_id='13' siblings='13'/>
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<cpu id='14' socket_id='3' core_id='14' siblings='14'/>
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<cpu id='15' socket_id='3' core_id='15' siblings='15'/>
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</cpus>
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</cell>
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</cells>
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</topology>
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</host>
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</capabilities>
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@ -1,74 +0,0 @@
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<capabilities>
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<host>
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<cpu>
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<arch>x86_64</arch>
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</cpu>
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<power_management/>
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<topology>
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<cells num='4'>
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<cell id='0'>
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<memory unit='KiB'>2097152</memory>
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<distances>
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<sibling id='0' value='10'/>
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<sibling id='1' value='20'/>
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<sibling id='2' value='20'/>
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<sibling id='3' value='20'/>
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</distances>
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<cpus num='4'>
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<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
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<cpu id='0' socket_id='0' core_id='1' siblings='0'/>
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<cpu id='0' socket_id='0' core_id='2' siblings='0'/>
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<cpu id='0' socket_id='0' core_id='3' siblings='0'/>
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</cpus>
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</cell>
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<cell id='1'>
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<memory unit='KiB'>2097152</memory>
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<distances>
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<sibling id='0' value='20'/>
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<sibling id='1' value='10'/>
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<sibling id='2' value='20'/>
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<sibling id='3' value='20'/>
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</distances>
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<cpus num='4'>
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<cpu id='1' socket_id='1' core_id='1' siblings='1'/>
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<cpu id='1' socket_id='1' core_id='2' siblings='1'/>
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<cpu id='1' socket_id='1' core_id='3' siblings='1'/>
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<cpu id='1' socket_id='1' core_id='4' siblings='1'/>
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</cpus>
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</cell>
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<cell id='2'>
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<memory unit='KiB'>2097152</memory>
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<distances>
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<sibling id='0' value='20'/>
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<sibling id='1' value='20'/>
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<sibling id='2' value='10'/>
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<sibling id='3' value='20'/>
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</distances>
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<cpus num='4'>
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<cpu id='2' socket_id='2' core_id='2' siblings='2'/>
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<cpu id='2' socket_id='2' core_id='3' siblings='2'/>
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<cpu id='2' socket_id='2' core_id='4' siblings='2'/>
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<cpu id='2' socket_id='2' core_id='5' siblings='2'/>
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</cpus>
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</cell>
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<cell id='3'>
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<memory unit='KiB'>2097152</memory>
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<distances>
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<sibling id='0' value='20'/>
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<sibling id='1' value='20'/>
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<sibling id='2' value='20'/>
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<sibling id='3' value='10'/>
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</distances>
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<cpus num='4'>
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<cpu id='3' socket_id='3' core_id='3' siblings='3'/>
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<cpu id='3' socket_id='3' core_id='4' siblings='3'/>
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<cpu id='3' socket_id='3' core_id='5' siblings='3'/>
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<cpu id='3' socket_id='3' core_id='6' siblings='3'/>
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</cpus>
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</cell>
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</cells>
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</topology>
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</host>
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</capabilities>
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62
tests/vircaps2xmldata/vircaps-x86_64-basic.xml
Normal file
62
tests/vircaps2xmldata/vircaps-x86_64-basic.xml
Normal file
@ -0,0 +1,62 @@
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<capabilities>
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<host>
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<cpu>
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<arch>x86_64</arch>
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</cpu>
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<power_management/>
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<topology>
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<cells num='4'>
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<cell id='0'>
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<memory unit='KiB'>1048576</memory>
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<pages unit='KiB' size='4'>2048</pages>
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<pages unit='KiB' size='2048'>4096</pages>
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<pages unit='KiB' size='1048576'>6144</pages>
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<cpus num='4'>
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<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
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<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
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<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
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<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
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</cpus>
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</cell>
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<cell id='1'>
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<memory unit='KiB'>2097152</memory>
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<pages unit='KiB' size='4'>4096</pages>
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<pages unit='KiB' size='2048'>6144</pages>
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<pages unit='KiB' size='1048576'>8192</pages>
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<cpus num='4'>
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<cpu id='4' socket_id='1' core_id='4' siblings='4'/>
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<cpu id='5' socket_id='1' core_id='5' siblings='5'/>
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<cpu id='6' socket_id='1' core_id='6' siblings='6'/>
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<cpu id='7' socket_id='1' core_id='7' siblings='7'/>
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</cpus>
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</cell>
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<cell id='2'>
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<memory unit='KiB'>3145728</memory>
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<pages unit='KiB' size='4'>6144</pages>
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<pages unit='KiB' size='2048'>8192</pages>
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<pages unit='KiB' size='1048576'>10240</pages>
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<cpus num='4'>
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<cpu id='8' socket_id='2' core_id='8' siblings='8'/>
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<cpu id='9' socket_id='2' core_id='9' siblings='9'/>
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<cpu id='10' socket_id='2' core_id='10' siblings='10'/>
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<cpu id='11' socket_id='2' core_id='11' siblings='11'/>
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</cpus>
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</cell>
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<cell id='3'>
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<memory unit='KiB'>4194304</memory>
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<pages unit='KiB' size='4'>8192</pages>
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<pages unit='KiB' size='2048'>10240</pages>
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<pages unit='KiB' size='1048576'>12288</pages>
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<cpus num='4'>
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<cpu id='12' socket_id='3' core_id='12' siblings='12'/>
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<cpu id='13' socket_id='3' core_id='13' siblings='13'/>
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<cpu id='14' socket_id='3' core_id='14' siblings='14'/>
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<cpu id='15' socket_id='3' core_id='15' siblings='15'/>
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</cpus>
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</cell>
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</cells>
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</topology>
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</host>
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</capabilities>
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33
tests/vircaps2xmldata/vircaps-x86_64-caches.xml
Normal file
33
tests/vircaps2xmldata/vircaps-x86_64-caches.xml
Normal file
@ -0,0 +1,33 @@
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<capabilities>
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<host>
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<cpu>
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<arch>x86_64</arch>
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</cpu>
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<power_management/>
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<migration_features>
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<live/>
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</migration_features>
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<topology>
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<cells num='1'>
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<cell id='0'>
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<memory unit='KiB'>1048576</memory>
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<pages unit='KiB' size='4'>2048</pages>
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<pages unit='KiB' size='2048'>4096</pages>
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<pages unit='KiB' size='1048576'>6144</pages>
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<cpus num='8'>
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<cpu id='0' socket_id='0' core_id='0' siblings='0,4'/>
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<cpu id='1' socket_id='0' core_id='1' siblings='1,5'/>
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<cpu id='2' socket_id='0' core_id='2' siblings='2,6'/>
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<cpu id='3' socket_id='0' core_id='3' siblings='3,7'/>
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<cpu id='4' socket_id='0' core_id='0' siblings='0,4'/>
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<cpu id='5' socket_id='0' core_id='1' siblings='1,5'/>
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<cpu id='6' socket_id='0' core_id='2' siblings='2,6'/>
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<cpu id='7' socket_id='0' core_id='3' siblings='3,7'/>
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</cpus>
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</cell>
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</cells>
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</topology>
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</host>
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</capabilities>
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@ -25,99 +25,51 @@
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#include "testutils.h"
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#include "capabilities.h"
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#include "virbitmap.h"
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#include "virsysfspriv.h"
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#define VIR_FROM_THIS VIR_FROM_NONE
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static virCapsPtr
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buildVirCapabilities(int max_cells,
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int max_cpus_in_cell,
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int max_mem_in_cell)
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{
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virCapsPtr caps;
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virCapsHostNUMACellCPUPtr cell_cpus = NULL;
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virCapsHostNUMACellSiblingInfoPtr siblings = NULL;
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int core_id, cell_id, nsiblings;
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int id;
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size_t i;
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#ifdef __linux__
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if ((caps = virCapabilitiesNew(VIR_ARCH_X86_64, false, false)) == NULL)
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goto error;
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id = 0;
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for (cell_id = 0; cell_id < max_cells; cell_id++) {
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if (VIR_ALLOC_N(cell_cpus, max_cpus_in_cell) < 0)
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goto error;
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for (core_id = 0; core_id < max_cpus_in_cell; core_id++) {
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cell_cpus[core_id].id = id;
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cell_cpus[core_id].socket_id = cell_id;
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cell_cpus[core_id].core_id = id + core_id;
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if (!(cell_cpus[core_id].siblings =
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virBitmapNew(max_cpus_in_cell)))
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goto error;
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ignore_value(virBitmapSetBit(cell_cpus[core_id].siblings, id));
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}
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id++;
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if (VIR_ALLOC_N(siblings, max_cells) < 0)
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goto error;
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nsiblings = max_cells;
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for (i = 0; i < nsiblings; i++) {
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siblings[i].node = i;
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/* Some magical constants, see virNumaGetDistances()
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* for their description. */
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siblings[i].distance = cell_id == i ? 10 : 20;
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}
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if (virCapabilitiesAddHostNUMACell(caps, cell_id,
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max_mem_in_cell,
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max_cpus_in_cell, cell_cpus,
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nsiblings, siblings,
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0, NULL) < 0)
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goto error;
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cell_cpus = NULL;
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siblings = NULL;
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}
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return caps;
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error:
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virCapabilitiesClearHostNUMACellCPUTopology(cell_cpus, max_cpus_in_cell);
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VIR_FREE(cell_cpus);
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VIR_FREE(siblings);
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virObjectUnref(caps);
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return NULL;
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}
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struct virCapabilitiesFormatData {
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struct virCapabilitiesData {
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const char *filename;
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int max_cells;
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int max_cpus_in_cell;
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int max_mem_in_cell;
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virArch arch;
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bool offlineMigrate;
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bool liveMigrate;
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};
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static int
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test_virCapabilitiesFormat(const void *opaque)
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test_virCapabilities(const void *opaque)
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{
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struct virCapabilitiesFormatData *data = (struct virCapabilitiesFormatData *) opaque;
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struct virCapabilitiesData *data = (struct virCapabilitiesData *) opaque;
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const char *archStr = virArchToString(data->arch);
|
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virCapsPtr caps = NULL;
|
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char *capsXML = NULL;
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char *path = NULL;
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char *dir = NULL;
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int ret = -1;
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|
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if (!(caps = buildVirCapabilities(data->max_cells, data->max_cpus_in_cell,
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data->max_mem_in_cell)))
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if (virAsprintf(&dir, "%s/vircaps2xmldata/linux-%s",
|
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abs_srcdir, data->filename) < 0)
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goto cleanup;
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|
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virSysfsSetSystemPath(dir);
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caps = virCapabilitiesNew(data->arch, data->offlineMigrate, data->liveMigrate);
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|
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if (!caps)
|
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goto cleanup;
|
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|
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if (virCapabilitiesInitNUMA(caps) < 0)
|
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goto cleanup;
|
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|
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virSysfsSetSystemPath(NULL);
|
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|
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if (!(capsXML = virCapabilitiesFormatXML(caps)))
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goto cleanup;
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|
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if (virAsprintf(&path, "%s/vircaps2xmldata/vircaps-%s.xml",
|
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abs_srcdir, data->filename) < 0)
|
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if (virAsprintf(&path, "%s/vircaps2xmldata/vircaps-%s-%s.xml",
|
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abs_srcdir, archStr, data->filename) < 0)
|
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goto cleanup;
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|
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if (virTestCompareToFile(capsXML, path) < 0)
|
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@ -126,6 +78,7 @@ test_virCapabilitiesFormat(const void *opaque)
|
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ret = 0;
|
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|
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cleanup:
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VIR_FREE(dir);
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VIR_FREE(path);
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VIR_FREE(capsXML);
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virObjectUnref(caps);
|
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@ -137,19 +90,33 @@ mymain(void)
|
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{
|
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int ret = 0;
|
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|
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#define DO_TEST(filename, max_cells, \
|
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max_cpus_in_cell, max_mem_in_cell) \
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do { \
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struct virCapabilitiesFormatData data = {filename, max_cells, \
|
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max_cpus_in_cell, \
|
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max_mem_in_cell}; \
|
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if (virTestRun(filename, test_virCapabilitiesFormat, &data) < 0) \
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ret = -1; \
|
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# define DO_TEST_FULL(filename, arch, offlineMigrate, liveMigrate) \
|
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do { \
|
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struct virCapabilitiesData data = {filename, arch, \
|
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offlineMigrate, \
|
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liveMigrate}; \
|
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if (virTestRun(filename, test_virCapabilities, &data) < 0) \
|
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ret = -1; \
|
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} while (0)
|
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|
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DO_TEST("basic-4-4-2G", 4, 4, 2*1024*1024);
|
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# define DO_TEST(filename, arch) DO_TEST_FULL(filename, arch, true, true)
|
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|
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DO_TEST_FULL("basic", VIR_ARCH_X86_64, false, false);
|
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DO_TEST_FULL("basic", VIR_ARCH_AARCH64, true, false);
|
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|
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DO_TEST("caches", VIR_ARCH_X86_64);
|
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|
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return ret;
|
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}
|
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|
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VIRT_TEST_MAIN(mymain)
|
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VIRT_TEST_MAIN_PRELOAD(mymain, abs_builddir "/.libs/virnumamock.so")
|
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|
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#else /* !__linux__ */
|
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|
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int
|
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main(void)
|
||||
{
|
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return EXIT_AM_SKIP;
|
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}
|
||||
|
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#endif /* !__linux__ */
|
||||
|
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