From ae16c95f1bb5591c27676c5de8d383e5612c3568 Mon Sep 17 00:00:00 2001 From: Nitesh Konkar Date: Fri, 6 Jan 2017 18:25:41 +0530 Subject: [PATCH] perf: Add cache_l1d perf event support This patch adds support and documentation for a generalized hardware cache event called cache_l1d perf event. Signed-off-by: Nitesh Konkar --- docs/formatdomain.html.in | 7 +++++++ docs/news.html.in | 5 +++-- docs/schemas/domaincommon.rng | 1 + include/libvirt/libvirt-domain.h | 11 +++++++++++ src/libvirt-domain.c | 2 ++ src/qemu/qemu_driver.c | 1 + src/util/virperf.c | 6 +++++- src/util/virperf.h | 1 + tests/genericxml2xmlindata/generic-perf.xml | 1 + tools/virsh.pod | 5 ++++- 10 files changed, 36 insertions(+), 4 deletions(-) diff --git a/docs/formatdomain.html.in b/docs/formatdomain.html.in index f7bef51dec..e192b77d09 100644 --- a/docs/formatdomain.html.in +++ b/docs/formatdomain.html.in @@ -1937,6 +1937,7 @@ <event name='stalled_cycles_frontend' enabled='no'/> <event name='stalled_cycles_backend' enabled='no'/> <event name='ref_cpu_cycles' enabled='no'/> + <event name='cache_l1d' enabled='no'/> </perf> ... @@ -2015,6 +2016,12 @@ by applications running on the platform perf.ref_cpu_cycles + + cache_l1d + the count of total level 1 data cache by applications running on + the platform + perf.cache_l1d +

Devices

diff --git a/docs/news.html.in b/docs/news.html.in index c2220753ea..052a3e6b34 100644 --- a/docs/news.html.in +++ b/docs/news.html.in @@ -46,8 +46,9 @@
  • perf: Add more perf statistics
    Add support to get the count of branch instructions executed, branch misses, bus cycles, stalled frontend - cpu cycles, stalled backend cpu cycles, and ref cpu - cycles by applications running on the platform + cpu cycles, stalled backend cpu cycles, ref cpu + cycles and cache l1d by applications running on + the platform
  • conf: Display <physical> for volume xml
    Add a display of the <physical> size of a disk diff --git a/docs/schemas/domaincommon.rng b/docs/schemas/domaincommon.rng index 4d76315b09..be0a609aba 100644 --- a/docs/schemas/domaincommon.rng +++ b/docs/schemas/domaincommon.rng @@ -433,6 +433,7 @@ stalled_cycles_frontend stalled_cycles_backend ref_cpu_cycles + cache_l1d diff --git a/include/libvirt/libvirt-domain.h b/include/libvirt/libvirt-domain.h index e303140a23..1e0e74c634 100644 --- a/include/libvirt/libvirt-domain.h +++ b/include/libvirt/libvirt-domain.h @@ -2188,6 +2188,17 @@ void virDomainStatsRecordListFree(virDomainStatsRecordPtr *stats); */ # define VIR_PERF_PARAM_REF_CPU_CYCLES "ref_cpu_cycles" +/** + * VIR_PERF_PARAM_CACHE_L1D: + * + * Macro for typed parameter name that represents cache_l1d + * perf event which can be used to measure the count of total + * level 1 data cache by applications running on the platform. + * It corresponds to the "perf.cache_l1d" field in the + * *Stats APIs. + */ +# define VIR_PERF_PARAM_CACHE_L1D "cache_l1d" + int virDomainGetPerfEvents(virDomainPtr dom, virTypedParameterPtr *params, int *nparams, diff --git a/src/libvirt-domain.c b/src/libvirt-domain.c index 5b3e842058..3023f30876 100644 --- a/src/libvirt-domain.c +++ b/src/libvirt-domain.c @@ -11250,6 +11250,8 @@ virConnectGetDomainCapabilities(virConnectPtr conn, * CPU frequency scaling by applications running * as unsigned long long. It is produced by the * ref_cpu_cycles perf event. + * "perf.cache_l1d" - The count of total level 1 data cache as unsigned + * long long. It is produced by cache_l1d perf event. * * Note that entire stats groups or individual stat fields may be missing from * the output in case they are not supported by the given hypervisor, are not diff --git a/src/qemu/qemu_driver.c b/src/qemu/qemu_driver.c index 89fd6b22a9..e3bc8cc77b 100644 --- a/src/qemu/qemu_driver.c +++ b/src/qemu/qemu_driver.c @@ -9859,6 +9859,7 @@ qemuDomainSetPerfEvents(virDomainPtr dom, VIR_PERF_PARAM_STALLED_CYCLES_FRONTEND, VIR_TYPED_PARAM_BOOLEAN, VIR_PERF_PARAM_STALLED_CYCLES_BACKEND, VIR_TYPED_PARAM_BOOLEAN, VIR_PERF_PARAM_REF_CPU_CYCLES, VIR_TYPED_PARAM_BOOLEAN, + VIR_PERF_PARAM_CACHE_L1D, VIR_TYPED_PARAM_BOOLEAN, NULL) < 0) return -1; diff --git a/src/util/virperf.c b/src/util/virperf.c index f64692bf39..8554723b52 100644 --- a/src/util/virperf.c +++ b/src/util/virperf.c @@ -43,7 +43,8 @@ VIR_ENUM_IMPL(virPerfEvent, VIR_PERF_EVENT_LAST, "cache_references", "cache_misses", "branch_instructions", "branch_misses", "bus_cycles", "stalled_cycles_frontend", - "stalled_cycles_backend", "ref_cpu_cycles"); + "stalled_cycles_backend", "ref_cpu_cycles", + "cache_l1d"); struct virPerfEvent { int type; @@ -112,6 +113,9 @@ static struct virPerfEventAttr attrs[] = { .attrConfig = 0, # endif }, + {.type = VIR_PERF_EVENT_CACHE_L1D, + .attrType = PERF_TYPE_HW_CACHE, + .attrConfig = PERF_COUNT_HW_CACHE_L1D}, }; typedef struct virPerfEventAttr *virPerfEventAttrPtr; diff --git a/src/util/virperf.h b/src/util/virperf.h index 1f43c92beb..4c562afba1 100644 --- a/src/util/virperf.h +++ b/src/util/virperf.h @@ -47,6 +47,7 @@ typedef enum { the backend of the instruction processor pipeline */ VIR_PERF_EVENT_REF_CPU_CYCLES, /* Count of ref cpu cycles */ + VIR_PERF_EVENT_CACHE_L1D, /* Count of level 1 data cache*/ VIR_PERF_EVENT_LAST } virPerfEventType; diff --git a/tests/genericxml2xmlindata/generic-perf.xml b/tests/genericxml2xmlindata/generic-perf.xml index 437cd65ccc..d1418d08c8 100644 --- a/tests/genericxml2xmlindata/generic-perf.xml +++ b/tests/genericxml2xmlindata/generic-perf.xml @@ -26,6 +26,7 @@ + diff --git a/tools/virsh.pod b/tools/virsh.pod index 84694ffbbd..a70f32238a 100644 --- a/tools/virsh.pod +++ b/tools/virsh.pod @@ -950,7 +950,8 @@ I<--perf> returns the statistics of all enabled perf events: "perf.bus_cycles" - the count of bus cycles, "perf.stalled_cycles_frontend" - the count of stalled frontend cpu cycles, "perf.stalled_cycles_backend" - the count of stalled backend cpu cycles, -"perf.ref_cpu_cycles" - the count of ref cpu cycles +"perf.ref_cpu_cycles" - the count of ref cpu cycles, +"perf.cache_l1d" - the count of level 1 data cache See the B command for more details about each event. @@ -2315,6 +2316,8 @@ B ref_cpu_cycles - Provides the count of total cpu cycles not affected by CPU frequency scaling by applications running on the platform. + cache_l1d - Provides the count of total level 1 data cache + by applications running on the platform. B: The statistics can be retrieved using the B command using the I<--perf> flag.