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cpu_map: Add versions of IvyBridge CPU model

Browse Source 
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
This commit is contained in:
Jiri Denemark 2024-10-22 11:46:14 +02:00
parent 569a06b07e
commit d00ba759c4
47 changed files with 505 additions and 83 deletions
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2
src/cpu_map/index.xml
View File

@ -37,6 +37,8 @@
<include filename='x86_SandyBridge-IBRS.xml'/>
<include filename='x86_IvyBridge.xml'/>
<include filename='x86_IvyBridge-IBRS.xml'/>
<include filename='x86_IvyBridge-v1.xml'/>
<include filename='x86_IvyBridge-v2.xml'/>
<include filename='x86_Haswell-noTSX.xml'/>
<include filename='x86_Haswell-noTSX-IBRS.xml'/>
<include filename='x86_Haswell.xml'/>

2
src/cpu_map/meson.build
View File

@ -76,6 +76,8 @@ cpumap_data = [
'x86_Icelake-Server-v7.xml',
'x86_Icelake-Server.xml',
'x86_IvyBridge-IBRS.xml',
'x86_IvyBridge-v1.xml',
'x86_IvyBridge-v2.xml',
'x86_IvyBridge.xml',
'x86_kvm32.xml',
'x86_kvm64.xml',

6
src/cpu_map/x86_IvyBridge-v1.xml Normal file
View File

@ -0,0 +1,6 @@
<cpus>
<model name='IvyBridge-v1'>
<decode host='on' guest='off'/>
<model name='IvyBridge'/>
</model>
</cpus>

6
src/cpu_map/x86_IvyBridge-v2.xml Normal file
View File

@ -0,0 +1,6 @@
<cpus>
<model name='IvyBridge-v2'>
<decode host='on' guest='off'/>
<model name='IvyBridge-IBRS'/>
</model>
</cpus>

2
tests/cputestdata/x86_64-cpuid-Core-i7-3520M-host.xml
View File

@ -1,6 +1,6 @@
<cpu>
<arch>x86_64</arch>
<model>IvyBridge</model>
<model>IvyBridge-v1</model>
<vendor>Intel</vendor>
<signature family='6' model='58' stepping='9'/>
<feature name='dtes64'/>

2
tests/cputestdata/x86_64-cpuid-Core-i7-3740QM-host.xml
View File

@ -1,6 +1,6 @@
<cpu>
<arch>x86_64</arch>
<model>IvyBridge</model>
<model>IvyBridge-v1</model>
<vendor>Intel</vendor>
<signature family='6' model='58' stepping='9'/>
<feature name='dtes64'/>

2
tests/cputestdata/x86_64-cpuid-Core-i7-3770-host.xml
View File

@ -1,6 +1,6 @@
<cpu>
<arch>x86_64</arch>
<model>IvyBridge</model>
<model>IvyBridge-v1</model>
<vendor>Intel</vendor>
<signature family='6' model='58' stepping='9'/>
<feature name='dtes64'/>

13
tests/domaincapsdata/qemu_5.2.0-q35.x86_64.xml
View File

@ -496,15 +496,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

19
tests/domaincapsdata/qemu_5.2.0-tcg.x86_64.xml
View File

@ -852,14 +852,14 @@
<feature name='x2apic'/>
<feature name='xsavec'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
@ -867,6 +867,21 @@
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_5.2.0.x86_64.xml
View File

@ -495,15 +495,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_6.0.0-q35.x86_64.xml
View File

@ -505,15 +505,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

19
tests/domaincapsdata/qemu_6.0.0-tcg.x86_64.xml
View File

@ -884,14 +884,14 @@
<feature name='x2apic'/>
<feature name='xsavec'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
@ -899,6 +899,21 @@
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_6.0.0.x86_64.xml
View File

@ -504,15 +504,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_6.1.0-q35.x86_64.xml
View File

@ -569,15 +569,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

19
tests/domaincapsdata/qemu_6.1.0-tcg.x86_64.xml
View File

@ -992,14 +992,14 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
@ -1007,6 +1007,21 @@
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_6.1.0.x86_64.xml
View File

@ -568,15 +568,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_6.2.0-q35.x86_64.xml
View File

@ -566,15 +566,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

19
tests/domaincapsdata/qemu_6.2.0-tcg.x86_64.xml
View File

@ -990,14 +990,14 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
@ -1005,6 +1005,21 @@
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_6.2.0.x86_64.xml
View File

@ -565,15 +565,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_7.0.0-q35.x86_64.xml
View File

@ -593,15 +593,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

19
tests/domaincapsdata/qemu_7.0.0-tcg.x86_64.xml
View File

@ -1022,14 +1022,14 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
@ -1037,6 +1037,21 @@
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_7.0.0.x86_64.xml
View File

@ -592,15 +592,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_7.1.0-q35.x86_64.xml
View File

@ -560,15 +560,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

19
tests/domaincapsdata/qemu_7.1.0-tcg.x86_64.xml
View File

@ -970,14 +970,14 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='avx'/>
<feature name='f16c'/>
@ -985,6 +985,21 @@
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='avx'/>
<feature name='f16c'/>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_7.1.0.x86_64.xml
View File

@ -559,15 +559,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_7.2.0-q35.x86_64.xml
View File

@ -565,15 +565,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

15
tests/domaincapsdata/qemu_7.2.0-tcg.x86_64+hvf.xml
View File

@ -795,17 +795,28 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

15
tests/domaincapsdata/qemu_7.2.0-tcg.x86_64.xml
View File

@ -795,17 +795,28 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_7.2.0.x86_64.xml
View File

@ -564,15 +564,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_8.0.0-q35.x86_64.xml
View File

@ -565,15 +565,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

15
tests/domaincapsdata/qemu_8.0.0-tcg.x86_64.xml
View File

@ -795,17 +795,28 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_8.0.0.x86_64.xml
View File

@ -564,15 +564,24 @@
<feature name='vaes'/>
<feature name='vpclmulqdq'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_8.1.0-q35.x86_64.xml
View File

@ -703,15 +703,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

15
tests/domaincapsdata/qemu_8.1.0-tcg.x86_64.xml
View File

@ -777,17 +777,28 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_8.1.0.x86_64.xml
View File

@ -702,15 +702,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_8.2.0-q35.x86_64.xml
View File

@ -704,15 +704,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

15
tests/domaincapsdata/qemu_8.2.0-tcg.x86_64.xml
View File

@ -766,17 +766,28 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
<feature name='x2apic'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_8.2.0.x86_64.xml
View File

@ -703,15 +703,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.0.0-q35.x86_64.xml
View File

@ -704,15 +704,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.0.0-tcg.x86_64.xml
View File

@ -732,15 +732,24 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.0.0.x86_64.xml
View File

@ -703,15 +703,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.1.0-q35.x86_64.xml
View File

@ -737,15 +737,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.1.0-tcg.x86_64.xml
View File

@ -757,15 +757,24 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.1.0.x86_64.xml
View File

@ -736,15 +736,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.2.0-q35.x86_64.xml
View File

@ -737,15 +737,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.2.0-tcg.x86_64.xml
View File

@ -757,15 +757,24 @@
<feature name='xsavec'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='tsc-deadline'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='spec-ctrl'/>
<feature name='tsc-deadline'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>

13
tests/domaincapsdata/qemu_9.2.0.x86_64.xml
View File

@ -736,15 +736,24 @@
<feature name='vpclmulqdq'/>
<feature name='xsaves'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
<blockers model='IvyBridge'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
<blockers model='IvyBridge-IBRS'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
<blockers model='IvyBridge-v1'>
<feature name='erms'/>
</blockers>
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
<blockers model='IvyBridge-v2'>
<feature name='erms'/>
<feature name='spec-ctrl'/>
</blockers>
<model usable='yes' vendor='Intel'>Nehalem</model>
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
<blockers model='Nehalem-IBRS'>