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cpu_map: Add versions of IvyBridge CPU model
Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
This commit is contained in:
parent
569a06b07e
commit
d00ba759c4
@ -37,6 +37,8 @@
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<include filename='x86_SandyBridge-IBRS.xml'/>
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<include filename='x86_SandyBridge-IBRS.xml'/>
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<include filename='x86_IvyBridge.xml'/>
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<include filename='x86_IvyBridge.xml'/>
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<include filename='x86_IvyBridge-IBRS.xml'/>
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<include filename='x86_IvyBridge-IBRS.xml'/>
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<include filename='x86_IvyBridge-v1.xml'/>
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<include filename='x86_IvyBridge-v2.xml'/>
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<include filename='x86_Haswell-noTSX.xml'/>
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<include filename='x86_Haswell-noTSX.xml'/>
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<include filename='x86_Haswell-noTSX-IBRS.xml'/>
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<include filename='x86_Haswell-noTSX-IBRS.xml'/>
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<include filename='x86_Haswell.xml'/>
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<include filename='x86_Haswell.xml'/>
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@ -76,6 +76,8 @@ cpumap_data = [
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'x86_Icelake-Server-v7.xml',
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'x86_Icelake-Server-v7.xml',
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'x86_Icelake-Server.xml',
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'x86_Icelake-Server.xml',
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'x86_IvyBridge-IBRS.xml',
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'x86_IvyBridge-IBRS.xml',
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'x86_IvyBridge-v1.xml',
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'x86_IvyBridge-v2.xml',
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'x86_IvyBridge.xml',
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'x86_IvyBridge.xml',
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'x86_kvm32.xml',
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'x86_kvm32.xml',
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'x86_kvm64.xml',
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'x86_kvm64.xml',
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6
src/cpu_map/x86_IvyBridge-v1.xml
Normal file
6
src/cpu_map/x86_IvyBridge-v1.xml
Normal file
@ -0,0 +1,6 @@
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<cpus>
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<model name='IvyBridge-v1'>
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<decode host='on' guest='off'/>
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<model name='IvyBridge'/>
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</model>
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</cpus>
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6
src/cpu_map/x86_IvyBridge-v2.xml
Normal file
6
src/cpu_map/x86_IvyBridge-v2.xml
Normal file
@ -0,0 +1,6 @@
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<cpus>
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<model name='IvyBridge-v2'>
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<decode host='on' guest='off'/>
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<model name='IvyBridge-IBRS'/>
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</model>
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</cpus>
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@ -1,6 +1,6 @@
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<cpu>
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<cpu>
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<arch>x86_64</arch>
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<arch>x86_64</arch>
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<model>IvyBridge</model>
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<model>IvyBridge-v1</model>
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<vendor>Intel</vendor>
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<vendor>Intel</vendor>
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<signature family='6' model='58' stepping='9'/>
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<signature family='6' model='58' stepping='9'/>
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<feature name='dtes64'/>
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<feature name='dtes64'/>
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@ -1,6 +1,6 @@
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<cpu>
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<cpu>
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<arch>x86_64</arch>
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<arch>x86_64</arch>
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<model>IvyBridge</model>
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<model>IvyBridge-v1</model>
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<vendor>Intel</vendor>
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<vendor>Intel</vendor>
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<signature family='6' model='58' stepping='9'/>
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<signature family='6' model='58' stepping='9'/>
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<feature name='dtes64'/>
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<feature name='dtes64'/>
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@ -1,6 +1,6 @@
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<cpu>
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<cpu>
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<arch>x86_64</arch>
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<arch>x86_64</arch>
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<model>IvyBridge</model>
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<model>IvyBridge-v1</model>
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<vendor>Intel</vendor>
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<vendor>Intel</vendor>
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<signature family='6' model='58' stepping='9'/>
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<signature family='6' model='58' stepping='9'/>
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<feature name='dtes64'/>
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<feature name='dtes64'/>
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@ -496,15 +496,24 @@
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<feature name='vaes'/>
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<feature name='vaes'/>
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<feature name='vpclmulqdq'/>
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<feature name='vpclmulqdq'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
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<blockers model='IvyBridge'>
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<blockers model='IvyBridge'>
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<feature name='erms'/>
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<feature name='erms'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
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<blockers model='IvyBridge-IBRS'>
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<blockers model='IvyBridge-IBRS'>
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<feature name='erms'/>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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<feature name='spec-ctrl'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v1</model>
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<blockers model='IvyBridge-v1'>
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<feature name='erms'/>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v2</model>
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<blockers model='IvyBridge-v2'>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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</blockers>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<blockers model='Nehalem-IBRS'>
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<blockers model='Nehalem-IBRS'>
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@ -852,14 +852,14 @@
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<feature name='x2apic'/>
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<feature name='x2apic'/>
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<feature name='xsavec'/>
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<feature name='xsavec'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
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<blockers model='IvyBridge'>
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<blockers model='IvyBridge'>
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<feature name='avx'/>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='f16c'/>
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<feature name='tsc-deadline'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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<feature name='x2apic'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
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<blockers model='IvyBridge-IBRS'>
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<blockers model='IvyBridge-IBRS'>
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<feature name='avx'/>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='f16c'/>
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@ -867,6 +867,21 @@
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<feature name='tsc-deadline'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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<feature name='x2apic'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v1</model>
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<blockers model='IvyBridge-v1'>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v2</model>
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<blockers model='IvyBridge-v2'>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='spec-ctrl'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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</blockers>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<blockers model='Nehalem-IBRS'>
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<blockers model='Nehalem-IBRS'>
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@ -495,15 +495,24 @@
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<feature name='vaes'/>
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<feature name='vaes'/>
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<feature name='vpclmulqdq'/>
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<feature name='vpclmulqdq'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
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<blockers model='IvyBridge'>
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<blockers model='IvyBridge'>
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<feature name='erms'/>
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<feature name='erms'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
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<blockers model='IvyBridge-IBRS'>
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<blockers model='IvyBridge-IBRS'>
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<feature name='erms'/>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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<feature name='spec-ctrl'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v1</model>
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<blockers model='IvyBridge-v1'>
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<feature name='erms'/>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v2</model>
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<blockers model='IvyBridge-v2'>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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</blockers>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<blockers model='Nehalem-IBRS'>
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<blockers model='Nehalem-IBRS'>
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@ -505,15 +505,24 @@
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<feature name='vaes'/>
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<feature name='vaes'/>
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<feature name='vpclmulqdq'/>
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<feature name='vpclmulqdq'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
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<blockers model='IvyBridge'>
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<blockers model='IvyBridge'>
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<feature name='erms'/>
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<feature name='erms'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
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<blockers model='IvyBridge-IBRS'>
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<blockers model='IvyBridge-IBRS'>
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<feature name='erms'/>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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<feature name='spec-ctrl'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v1</model>
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<blockers model='IvyBridge-v1'>
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<feature name='erms'/>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v2</model>
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<blockers model='IvyBridge-v2'>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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</blockers>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<blockers model='Nehalem-IBRS'>
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<blockers model='Nehalem-IBRS'>
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@ -884,14 +884,14 @@
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<feature name='x2apic'/>
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<feature name='x2apic'/>
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<feature name='xsavec'/>
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<feature name='xsavec'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
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<blockers model='IvyBridge'>
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<blockers model='IvyBridge'>
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<feature name='avx'/>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='f16c'/>
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<feature name='tsc-deadline'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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<feature name='x2apic'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
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<blockers model='IvyBridge-IBRS'>
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<blockers model='IvyBridge-IBRS'>
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<feature name='avx'/>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='f16c'/>
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@ -899,6 +899,21 @@
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<feature name='tsc-deadline'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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<feature name='x2apic'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v1</model>
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<blockers model='IvyBridge-v1'>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v2</model>
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<blockers model='IvyBridge-v2'>
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<feature name='avx'/>
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<feature name='f16c'/>
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<feature name='spec-ctrl'/>
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<feature name='tsc-deadline'/>
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<feature name='x2apic'/>
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</blockers>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<blockers model='Nehalem-IBRS'>
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<blockers model='Nehalem-IBRS'>
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@ -504,15 +504,24 @@
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<feature name='vaes'/>
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<feature name='vaes'/>
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<feature name='vpclmulqdq'/>
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<feature name='vpclmulqdq'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
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<blockers model='IvyBridge'>
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<blockers model='IvyBridge'>
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<feature name='erms'/>
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<feature name='erms'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
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<blockers model='IvyBridge-IBRS'>
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<blockers model='IvyBridge-IBRS'>
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<feature name='erms'/>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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<feature name='spec-ctrl'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v1</model>
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<blockers model='IvyBridge-v1'>
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<feature name='erms'/>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v2</model>
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<blockers model='IvyBridge-v2'>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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</blockers>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<blockers model='Nehalem-IBRS'>
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<blockers model='Nehalem-IBRS'>
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@ -569,15 +569,24 @@
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<feature name='vaes'/>
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<feature name='vaes'/>
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<feature name='vpclmulqdq'/>
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<feature name='vpclmulqdq'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
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<blockers model='IvyBridge'>
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<blockers model='IvyBridge'>
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<feature name='erms'/>
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<feature name='erms'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
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<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
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<blockers model='IvyBridge-IBRS'>
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<blockers model='IvyBridge-IBRS'>
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<feature name='erms'/>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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<feature name='spec-ctrl'/>
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</blockers>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v1</model>
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<blockers model='IvyBridge-v1'>
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<feature name='erms'/>
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</blockers>
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<model usable='no' vendor='Intel'>IvyBridge-v2</model>
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<blockers model='IvyBridge-v2'>
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<feature name='erms'/>
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<feature name='spec-ctrl'/>
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</blockers>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='yes' vendor='Intel'>Nehalem</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
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<blockers model='Nehalem-IBRS'>
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<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -992,14 +992,14 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
@ -1007,6 +1007,21 @@
|
|||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -568,15 +568,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -566,15 +566,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -990,14 +990,14 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
@ -1005,6 +1005,21 @@
|
|||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -565,15 +565,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -593,15 +593,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -1022,14 +1022,14 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
@ -1037,6 +1037,21 @@
|
|||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -592,15 +592,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -560,15 +560,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -970,14 +970,14 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='avx'/>
|
<feature name='avx'/>
|
||||||
<feature name='f16c'/>
|
<feature name='f16c'/>
|
||||||
@ -985,6 +985,21 @@
|
|||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='avx'/>
|
||||||
|
<feature name='f16c'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -559,15 +559,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -565,15 +565,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -795,17 +795,28 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -795,17 +795,28 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -564,15 +564,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -565,15 +565,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -795,17 +795,28 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -564,15 +564,24 @@
|
|||||||
<feature name='vaes'/>
|
<feature name='vaes'/>
|
||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -703,15 +703,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -777,17 +777,28 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -702,15 +702,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -704,15 +704,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -766,17 +766,28 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
<feature name='x2apic'/>
|
<feature name='x2apic'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
<feature name='x2apic'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -703,15 +703,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -704,15 +704,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -732,15 +732,24 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -703,15 +703,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -737,15 +737,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -757,15 +757,24 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -736,15 +736,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -737,15 +737,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -757,15 +757,24 @@
|
|||||||
<feature name='xsavec'/>
|
<feature name='xsavec'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
<feature name='tsc-deadline'/>
|
<feature name='tsc-deadline'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
<feature name='tsc-deadline'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
@ -736,15 +736,24 @@
|
|||||||
<feature name='vpclmulqdq'/>
|
<feature name='vpclmulqdq'/>
|
||||||
<feature name='xsaves'/>
|
<feature name='xsaves'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v1'>IvyBridge</model>
|
||||||
<blockers model='IvyBridge'>
|
<blockers model='IvyBridge'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
<model usable='no' vendor='Intel'>IvyBridge-IBRS</model>
|
<model usable='no' vendor='Intel' canonical='IvyBridge-v2'>IvyBridge-IBRS</model>
|
||||||
<blockers model='IvyBridge-IBRS'>
|
<blockers model='IvyBridge-IBRS'>
|
||||||
<feature name='erms'/>
|
<feature name='erms'/>
|
||||||
<feature name='spec-ctrl'/>
|
<feature name='spec-ctrl'/>
|
||||||
</blockers>
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v1</model>
|
||||||
|
<blockers model='IvyBridge-v1'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
</blockers>
|
||||||
|
<model usable='no' vendor='Intel'>IvyBridge-v2</model>
|
||||||
|
<blockers model='IvyBridge-v2'>
|
||||||
|
<feature name='erms'/>
|
||||||
|
<feature name='spec-ctrl'/>
|
||||||
|
</blockers>
|
||||||
<model usable='yes' vendor='Intel'>Nehalem</model>
|
<model usable='yes' vendor='Intel'>Nehalem</model>
|
||||||
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
<model usable='no' vendor='Intel'>Nehalem-IBRS</model>
|
||||||
<blockers model='Nehalem-IBRS'>
|
<blockers model='Nehalem-IBRS'>
|
||||||
|
Loading…
Reference in New Issue
Block a user