From d0431255aa119a542402854f6659c564f46403e8 Mon Sep 17 00:00:00 2001 From: Huaqiang Date: Thu, 14 Nov 2019 01:08:20 +0800 Subject: [PATCH] conf: showing cache/memoryBW monitor features in capabilities MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We learned that the hardware features of CAT, CMT, MBA and MBM are orthogonal ones, if CAT or MBA is not supported in system, but CMT or MBM are supported, then the cache monitor or memoryBW monitor features may not be correctly displayed in host capabilities through command 'virsh capabilites'. Showing the cache/memoryBW monitor capabilities even there is no support of cache allocation or memoryBW allocation features. Reviewed-by: Daniel P. Berrangé Signed-off-by: Huaqiang --- src/conf/capabilities.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/conf/capabilities.c b/src/conf/capabilities.c index 7021283310..4fac59e6f7 100644 --- a/src/conf/capabilities.c +++ b/src/conf/capabilities.c @@ -970,7 +970,7 @@ virCapabilitiesFormatCaches(virBufferPtr buf, size_t i = 0; size_t j = 0; - if (!cache->nbanks) + if (!cache->nbanks && !cache->monitor) return 0; virBufferAddLit(buf, "\n"); @@ -1055,7 +1055,7 @@ virCapabilitiesFormatMemoryBandwidth(virBufferPtr buf, { size_t i = 0; - if (!memBW->nnodes) + if (!memBW->nnodes && !memBW->monitor) return 0; virBufferAddLit(buf, "\n");