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cpu: Add support for al57 Intel features
We can start qemu with a "cpu,+la57" to set 57-bit vitrual address space. So VM can be aware that it need to enable 5-level paging. Corresponding QEMU commits: al57 6c7c3c21f95dd9af8a0691c0dd29b07247984122
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@ -285,6 +285,9 @@
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<feature name='ospke'>
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<feature name='ospke'>
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<cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000010'/>
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<cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00000010'/>
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</feature>
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</feature>
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<feature name='la57'>
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<cpuid eax_in='0x07' ecx_in='0x00' ecx='0x00010000'/>
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</feature>
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<feature name='avx512-4vnniw'>
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<feature name='avx512-4vnniw'>
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<cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000004'/>
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<cpuid eax_in='0x07' ecx_in='0x00' edx='0x00000004'/>
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@ -43,6 +43,7 @@
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<feature policy='require' name='clwb'/>
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<feature policy='require' name='clwb'/>
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<feature policy='require' name='pku'/>
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<feature policy='require' name='pku'/>
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<feature policy='require' name='ospke'/>
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<feature policy='require' name='ospke'/>
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<feature policy='require' name='la57'/>
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<feature policy='require' name='xsaveopt'/>
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<feature policy='require' name='xsaveopt'/>
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<feature policy='require' name='xgetbv1'/>
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<feature policy='require' name='xgetbv1'/>
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<feature policy='require' name='mmxext'/>
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<feature policy='require' name='mmxext'/>
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