From f97c4cc5e130ada351890a1f4f1ca65b1cf6d69d Mon Sep 17 00:00:00 2001
From: John Ferlan <jferlan@redhat.com>
Date: Sat, 19 May 2018 06:47:27 -0400
Subject: [PATCH] schema: Add microcode element to capability grammar

https://bugzilla.redhat.com/show_bug.cgi?id=1572491

Commit id 'd2440f3b5' added printing the <microcode> for the
capabilities, but didn't update the capabilities schema.

While at it, update capabilityschemadata for caps-test2
and caps-test3 to output some value for validation.

Signed-off-by: John Ferlan <jferlan@redhat.com>
ACKed-by Michal Privoznik <mprivozn@redhat.com>
---
 docs/schemas/capability.rng               | 7 +++++++
 tests/capabilityschemadata/caps-test2.xml | 1 +
 tests/capabilityschemadata/caps-test3.xml | 1 +
 3 files changed, 9 insertions(+)

diff --git a/docs/schemas/capability.rng b/docs/schemas/capability.rng
index c532f5dcc7..e1b7858540 100644
--- a/docs/schemas/capability.rng
+++ b/docs/schemas/capability.rng
@@ -102,6 +102,13 @@
         <text/>
       </element>
     </optional>
+    <optional>
+      <element name='microcode'>
+        <attribute name='version'>
+          <ref name='positiveInteger'/>
+        </attribute>
+      </element>
+    </optional>
     <element name='topology'>
       <attribute name='sockets'>
         <ref name='positiveInteger'/>
diff --git a/tests/capabilityschemadata/caps-test2.xml b/tests/capabilityschemadata/caps-test2.xml
index 6a45e4569b..652fc71e0b 100644
--- a/tests/capabilityschemadata/caps-test2.xml
+++ b/tests/capabilityschemadata/caps-test2.xml
@@ -5,6 +5,7 @@
       <arch>x86_64</arch>
       <model>SandyBridge</model>
       <vendor>Intel</vendor>
+      <microcode version='36'/>
       <topology sockets='1' cores='2' threads='2'/>
       <feature name='osxsave'/>
       <feature name='pdcm'/>
diff --git a/tests/capabilityschemadata/caps-test3.xml b/tests/capabilityschemadata/caps-test3.xml
index 7e21f85048..479db30612 100644
--- a/tests/capabilityschemadata/caps-test3.xml
+++ b/tests/capabilityschemadata/caps-test3.xml
@@ -6,6 +6,7 @@
       <arch>x86_64</arch>
       <model>Westmere</model>
       <vendor>Intel</vendor>
+      <microcode version='36'/>
       <topology sockets='1' cores='6' threads='2'/>
       <feature name='rdtscp'/>
       <feature name='pdpe1gb'/>