Commit Graph

7 Commits

Author SHA1 Message Date
Cole Robinson
812edc95a3 conf: cpu: Add <signature family=X model=X stepping=X/>
Internally we already collect x86 host family + model + stepping
numeric values. This exposed them in capabilities CPU output.
Example:

$ sudo virsh capabilities | grep -A1 -B1 signature
      <microcode version='240'/>
      <signature family='6' model='94' stepping='3'/>
      <counter name='tsc' frequency='3408010000' scaling='no'/>

Users need to know these values to calculate an expected.
SEV-ES/SEV-SNP launch measurement.

Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
Signed-off-by: Cole Robinson <crobinso@redhat.com>
2022-06-16 12:12:45 -04:00
Jiri Denemark
a32cc82793 cpu_map: Drop 'monitor' from modern x86 CPU models
The feature is never enabled by default on KVM and QEMU dropped it from
the models long ago.

https://bugzilla.redhat.com/show_bug.cgi?id=1798004

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Tim Wiederhake <twiederh@redhat.com>
2020-11-24 20:13:23 +01:00
Jiri Denemark
96a39aad70 cpu_map: Add missing AMD SVM features
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2020-06-19 21:59:31 +02:00
Jiri Denemark
892b7c70f6 cpu_map: Add missing x86 features in 0x80000008 CPUID leaf
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
2020-06-19 21:59:31 +02:00
Ani Sinha
1d17f881a2 cpu: add CLZERO CPUID support for AMD platforms
Qemu commit e900135dcfb67 ("i386: Add CPUID bit for CLZERO and XSAVEERPTR")
adds support for CLZERO CPUID bit.
This commit extends support for this CPUID bit into libvirt.

Signed-off-by: Ani Sinha <ani.sinha@nutanix.com>
Message-Id: <1575371352-99055-1-git-send-email-ani.sinha@nutanix.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2019-12-16 13:04:14 +01:00
Jiri Denemark
6d4a3cd427 cpu: Add EPYC-IBPB CPU model
This is a variant of EPYC with indirect branch prediction protection.
The only difference between EPYC and EPYC-IBPB is the added "ibpb"
feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-18 15:04:18 +01:00
Jiri Denemark
32e348be6b cputest: Add data for updated AMD EPYC 7601 32-Core Processor
The CPU contains the updated microcode for CVE-2017-5715.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2018-01-17 17:07:02 +01:00