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3 Commits

Author SHA1 Message Date
Daniel P. Berrangé
4cb90fa233 cputest: remove stibp flag from test data 
stibp flag doesn't exist in this maint branch.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
 2019-05-14 21:20:44 +01:00
Jiri Denemark
7bde733e90 cpu_map: Define md-clear CPUID bit 
CVE-2018-12126, CVE-2018-12127, CVE-2018-12130

The bit is set when microcode provides the mechanism to invoke a flush
of various exploitable CPU buffers by invoking the VERW instruction.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
(cherry picked from commit 538d873571d7a682852dc1d70e5f4478f4d64e85)

Conflicts:
	src/cpu_map/x86_features.xml
            - no CPU map split downstream

	tests/cputestdata/x86_64-cpuid-Xeon-Platinum-8268-guest.xml
	tests/cputestdata/x86_64-cpuid-Xeon-Platinum-8268-host.xml
            - test data missing downstream

	tests/cputestdata/x86_64-cpuid-Xeon-E3-1225-v5-guest.xml
	tests/cputestdata/x86_64-cpuid-Xeon-E3-1225-v5-host.xml
            - intel-pt feature is missing downstream

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
 2019-05-14 20:09:43 +01:00
Jiri Denemark
36151b10d3 cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5 
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
(cherry picked from commit 5cd9db3ac11e88846cbcf95fad9f6fae9d880dee)

CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091

Conflicts:
	tests/cputestdata/x86_64-cpuid-Xeon-E3-1225-v5-guest.xml
	tests/cputestdata/x86_64-cpuid-Xeon-E3-1225-v5-host.xml
            - intel-pt feature is missing

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
 2019-05-14 20:09:43 +01:00