3 Commits

Author	SHA1	Message	Date
Cole Robinson	812edc95a3	conf: cpu: Add <signature family=X model=X stepping=X/> ... Internally we already collect x86 host family + model + stepping numeric values. This exposed them in capabilities CPU output. Example: $ sudo virsh capabilities | grep -A1 -B1 signature <microcode version='240'/> <signature family='6' model='94' stepping='3'/> <counter name='tsc' frequency='3408010000' scaling='no'/> Users need to know these values to calculate an expected. SEV-ES/SEV-SNP launch measurement. Reviewed-by: Jiri Denemark <jdenemar@redhat.com> Signed-off-by: Cole Robinson <crobinso@redhat.com>	2022-06-16 12:12:45 -04:00
Jiri Denemark	538d873571	cpu_map: Define md-clear CPUID bit ... CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091 The bit is set when microcode provides the mechanism to invoke a flush of various exploitable CPU buffers by invoking the VERW instruction. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>	2019-05-14 19:33:37 +02:00
Jiri Denemark	5cd9db3ac1	cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5 ... Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>	2019-05-14 19:33:37 +02:00