Commit Graph

14 Commits

Author SHA1 Message Date
Tim Wiederhake
986be35f2e cpu_map: Sort cpu features
Some feature words were not sorted correctly.

Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2024-02-20 17:29:27 +01:00
Tim Wiederhake
6562669388 cpu_map: Add missing vmx features from MSR 0x491
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:47:05 +01:00
Tim Wiederhake
a155693a40 cpu_map: Add missing vmx features from MSR 0x490
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:47:02 +01:00
Tim Wiederhake
2e49a26158 cpu_map: Add missing vmx features from MSR 0x48F
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:47:00 +01:00
Tim Wiederhake
848e2d0949 cpu_map: Add missing vmx features from MSR 0x48E
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:46:58 +01:00
Tim Wiederhake
23f509c102 cpu_map: Add missing vmx features from MSR 0x48D
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:46:55 +01:00
Tim Wiederhake
102f6335b9 cpu_map: Add missing vmx features from MSR 0x48C
Differences from qemu:

* "vmx-ept-uc" (bit 8) and "vmx-ept-wb" (bit 14) are not added to
qemu's list of named features yet, but used in several qemu cpu
models never the less. Add to libvirt regardless.

* "vmx-invvpid-single-context" (bit 41) is erroneously called
"vmx-invept-single-context" in qemu. This is the name of the
feature associated with bit 25 in both libvirt and qemu.

* "vmx-invvpid-single-context-noglobals" (bit 43) is erroneously
called "vmx-invept-single-context-noglobals". Use the correct name.

Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:46:50 +01:00
Tim Wiederhake
94eacd5a5f cpu_map: Add missing vmx features from MSR 0x48B
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:46:47 +01:00
Tim Wiederhake
a1862e3de2 cpu_map: Add missing vmx features from MSR 0x485
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:46:44 +01:00
Tim Wiederhake
3590bb344e cpu_map: Add missing vmx features from MSR 0x480
Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2023-11-24 10:46:40 +01:00
Jiri Denemark
12eb0c9496 cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES MSR
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
2020-05-25 19:20:21 +02:00
Jiri Denemark
17cdefe5f1 cpu_map: Don't use new noTSX models for host-model CPUs
Host-model CPU definitions (and domain capabilities) will use the
original CPU models (without noTSX in their name) and explicitly disable
hle and rtm features. This way domains with host-model CPUs will be
migratable even to older versions of libvirt which do not support the
noTSX model variants.

The new models will be advertised in host capabilities and they may
be used explicitly with custom CPUs.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Tested-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
2020-03-25 22:27:39 +01:00
Christian Ehrhardt
dd17a4eba8 cpu_map: Add more -noTSX x86 CPU models
One of the mitigation methods for TAA[1] is to disable TSX
support on the host system.  Linux added a mechanism to disable
TSX globally through the kernel command line, and many Linux
distributions now default to tsx=off.  This makes existing CPU
models that have HLE and RTM enabled not usable anymore.

Add new versions of all CPU models that have the HLE and RTM
features enabled, that can be used when TSX is disabled in the
host system.

On systems disabling the features without those types defined
in cpu-maps users end up without modern CPU types in the list
of usable CPUs to use in the likes of virsh domcapabilities
or tools higher in the stack like virt-manager.

This adds:
-Cascadelake-Server-noTSX
-Icelake-Client-noTSX
-Icelake-Server-noTSX
-Skylake-Server-noTSX-IBRS
-Skylake-Client-noTSX-IBRS

Introduced in QEMU by commit v4.2.0-rc2-3-g9ab2237f19 (function)
                  and commit v4.2.0-rc2-4-g02fa60d101 (names)

References:

    [1] TAA, TSX asynchronous Abort:
        https://software.intel.com/security-software-guidance/insights/deep-dive-intel-transactional-synchronization-extensions-intel-tsx-asynchronous-abort
        https://www.kernel.org/doc/html/latest/admin-guide/hw-vuln/tsx_async_abort.html

Fixes: https://bugs.launchpad.net/ubuntu/+source/libvirt/+bug/1853200

Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Message-Id: <20200310104806.2723-2-christian.ehrhardt@canonical.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
2020-03-25 22:27:39 +01:00
Jiri Denemark
62a50628ff cputest: Add data for Intel(R) Core(TM) i7-8550U CPU without TSX
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
2020-03-09 16:17:34 +01:00