5 Commits

Author	SHA1	Message	Date
Tim Wiederhake	986be35f2e	cpu_map: Sort cpu features ... Some feature words were not sorted correctly. Signed-off-by: Tim Wiederhake <twiederh@redhat.com> Reviewed-by: Jiri Denemark <jdenemar@redhat.com>	2024-02-20 17:29:27 +01:00
Tim Wiederhake	877f609b8c	cpu_map: Add missing feature "flush-l1d" ... Signed-off-by: Tim Wiederhake <twiederh@redhat.com> Reviewed-by: Michal Privoznik <mprivozn@redhat.com>	2023-05-26 08:43:06 +02:00
Tim Wiederhake	24b95e07d2	cpu_map: Add missing x86 feature "sgx" ... Signed-off-by: Tim Wiederhake <twiederh@redhat.com> Reviewed-by: Jiri Denemark <jdenemar@redhat.com>	2022-11-08 21:44:40 +01:00
Jiri Denemark	538d873571	cpu_map: Define md-clear CPUID bit ... CVE-2018-12126, CVE-2018-12127, CVE-2018-12130, CVE-2019-11091 The bit is set when microcode provides the mechanism to invoke a flush of various exploitable CPU buffers by invoking the VERW instruction. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>	2019-05-14 19:33:37 +02:00
Jiri Denemark	5cd9db3ac1	cputest: Add data for Intel(R) Xeon(R) CPU E3-1225 v5 ... Signed-off-by: Jiri Denemark <jdenemar@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>	2019-05-14 19:33:37 +02:00