Tim Wiederhake 1f3cd74e4a cpu_map: Add missing x86 feature "bus-lock-detect" ...

Signed-off-by: Tim Wiederhake <twiederh@redhat.com>
Reviewed-by: Jiri Denemark <jdenemar@redhat.com>

2022-11-08 21:44:51 +01:00

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arm_a64fx.xml

cpu_map: Introduce Fujitsu a64fx

2022-09-06 18:35:14 +02:00

arm_cortex-a53.xml

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arm_cortex-a57.xml

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arm_cortex-a72.xml

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arm_Falkor.xml

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arm_features.xml

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arm_FT-2000plus.xml

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arm_Kunpeng-920.xml

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arm_Neoverse-N1.xml

cpu_map: Introduce Neoverse N1/N2/V1

2022-10-12 10:43:19 +02:00

arm_Neoverse-N2.xml

cpu_map: Introduce Neoverse N1/N2/V1

2022-10-12 10:43:19 +02:00

arm_Neoverse-V1.xml

cpu_map: Introduce Neoverse N1/N2/V1

2022-10-12 10:43:19 +02:00

arm_Tengyun-S2500.xml

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arm_ThunderX299xx.xml

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arm_vendors.xml

cpu_map: Introduce Fujitsu a64fx

2022-09-06 18:35:14 +02:00

index.xml

cpu_map: Introduce Neoverse N1/N2/V1

2022-10-12 10:43:19 +02:00

meson.build

cpu_map: Introduce Neoverse N1/N2/V1

2022-10-12 10:43:19 +02:00

ppc64_POWER6.xml

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ppc64_POWER7.xml

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ppc64_POWER8.xml

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ppc64_POWER9.xml

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ppc64_POWER10.xml

cpu_map: add POWER10 cpu model

2022-05-24 14:25:41 -03:00

ppc64_POWERPC_e5500.xml

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ppc64_POWERPC_e6500.xml

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ppc64_vendors.xml

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sync_qemu_features_i386.py

cpu_map: Add script to sync from QEMU i386 cpu features

2022-11-08 21:44:32 +01:00

sync_qemu_models_i386.py

cpu_map: Rename sync_qemu_i386.py

2022-11-08 21:44:36 +01:00

x86_486.xml

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x86_athlon.xml

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x86_Broadwell-IBRS.xml

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x86_Broadwell-noTSX-IBRS.xml

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x86_Broadwell-noTSX.xml

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x86_Broadwell.xml

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x86_Cascadelake-Server-noTSX.xml

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x86_Cascadelake-Server.xml

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x86_Conroe.xml

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x86_Cooperlake.xml

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x86_core2duo.xml

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x86_coreduo.xml

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x86_cpu64-rhel5.xml

cpu_map: Disable cpu64-rhel* for host-model and baseline

2022-05-06 17:33:46 +02:00

x86_cpu64-rhel6.xml

cpu_map: Disable cpu64-rhel* for host-model and baseline

2022-05-06 17:33:46 +02:00

x86_Dhyana.xml

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x86_EPYC-IBPB.xml

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x86_EPYC-Milan.xml

cpu_map: Fix spelling of svme-addr-chk feature

2021-03-04 09:33:39 +01:00

x86_EPYC-Rome.xml

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x86_EPYC.xml

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x86_features.xml

cpu_map: Add missing x86 feature "bus-lock-detect"

2022-11-08 21:44:51 +01:00

x86_Haswell-IBRS.xml

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x86_Haswell-noTSX-IBRS.xml

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x86_Haswell-noTSX.xml

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x86_Haswell.xml

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x86_Icelake-Client-noTSX.xml

cpu_map: Remove intel-pt from x86 CPU models

2021-01-26 15:44:50 +01:00

x86_Icelake-Client.xml

cpu_map: Remove intel-pt from x86 CPU models

2021-01-26 15:44:50 +01:00

x86_Icelake-Server-noTSX.xml

cpu_map: Remove intel-pt from x86 CPU models

2021-01-26 15:44:50 +01:00

x86_Icelake-Server.xml

cpu_map: Remove intel-pt from x86 CPU models

2021-01-26 15:44:50 +01:00

x86_IvyBridge-IBRS.xml

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x86_IvyBridge.xml

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x86_kvm32.xml

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x86_kvm64.xml

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x86_n270.xml

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x86_Nehalem-IBRS.xml

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x86_Nehalem.xml

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x86_Opteron_G1.xml

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x86_Opteron_G2.xml

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x86_Opteron_G3.xml

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x86_Opteron_G4.xml

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x86_Opteron_G5.xml

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x86_Penryn.xml

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x86_pentium2.xml

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x86_pentium3.xml

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x86_pentium.xml

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x86_pentiumpro.xml

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x86_phenom.xml

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x86_qemu32.xml

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x86_qemu64.xml

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x86_SandyBridge-IBRS.xml

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x86_SandyBridge.xml

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x86_Skylake-Client-IBRS.xml

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x86_Skylake-Client-noTSX-IBRS.xml

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x86_Skylake-Client.xml

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x86_Skylake-Server-IBRS.xml

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x86_Skylake-Server-noTSX-IBRS.xml

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x86_Skylake-Server.xml

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x86_Snowridge.xml

cpu_map: Define and enable Snowridge model

2021-01-07 23:23:41 +01:00

x86_vendors.xml

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x86_Westmere-IBRS.xml

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x86_Westmere.xml

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