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For machinetypes with a pci-root bus (all legacy PCI), libvirt will make a "fake" reservation for one extra slot prior to assigning addresses to unaddressed PCI endpoint devices in the domain. This will trigger auto-adding of a pci-bridge for the final device to be assigned an address *if that device would have otherwise instead been the last device on the last available pci-bridge*; thus it assures that there will always be at least one slot left open in the domain's bus topology for expansion (which is important both for hotplug (since a new pci-bridge can't be added while the guest is running) as well as for offline additions to the config (since adding a new device might otherwise in some cases require re-addressing existing devices, which we want to avoid)). It's important to note that for the above case (legacy PCI), we must check for the special case of all slots on all buses being occupied *prior to assigning any addresses*, and avoid attempting to reserve the extra address in that case, because there is no free address in the existing topology, so no place to auto-add a pci-bridge for expansion (i.e. it would always fail anyway). Since that condition can only be reached by manual intervention, this is acceptable. For machinetypes with pcie-root (Q35, aarch64 virt), libvirt's methodology for automatically expanding the bus topology is different - pcie-root-ports are plugged into slots (soon to be functions) of pcie-root as needed, and the new endpoint devices are assigned to the single slot in each pcie-root-port. This is done so that the devices are, by default, hotpluggable (the slots of pcie-root don't support hotplug, but the single slot of the pcie-root-port does). Since pcie-root-ports can only be plugged into pcie-root, and we don't auto-assign endpoint devices to the pcie-root slots, this means topology expansion doesn't compete with endpoint devices for slots, so we don't need to worry about checking for all "useful" slots being free *prior* to assigning addresses to new endpoint devices - as a matter of fact, if we attempt to reserve the open slots before the used slots, it can lead to errors. Instead this patch just reserves one slot for a "future potential" PCIe device after doing the assignment for actual devices, but only if the only PCI controller defined prior to starting address assignment was pcie-root, and only if we auto-added at least one PCI controller during address assignment. This assures two things: 1) that reserving the open slots will only be done when the domain is initially defined, never at any time after, and 2) that if the user understands enough about PCI controllers that they are adding them manually, that we don't mess up their plan by adding extras - if they know enough to add one pcie-root-port, or to manually assign addresses such that no pcie-root-ports are needed, they know enough to add extra pcie-root-ports if they want them (this could be called the "libguestfs clause", since libguestfs needs to be able to create domains with as few devices/controllers as possible). This is set to reserve a single free port for now, but could be increased in the future if public sentiment goes in that direction (it's easy to increase later, but essentially impossible to decrease)
149 lines
6.3 KiB
XML
149 lines
6.3 KiB
XML
<domain type='qemu'>
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<name>q35-test</name>
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<uuid>11dbdcdd-4c3b-482b-8903-9bdb8c0a2774</uuid>
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<memory unit='KiB'>2097152</memory>
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<currentMemory unit='KiB'>2097152</currentMemory>
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<vcpu placement='static' cpuset='0-1'>2</vcpu>
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<os>
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<type arch='x86_64' machine='q35'>hvm</type>
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<boot dev='hd'/>
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</os>
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<clock offset='utc'/>
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<on_poweroff>destroy</on_poweroff>
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<on_reboot>restart</on_reboot>
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<on_crash>destroy</on_crash>
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<devices>
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<emulator>/usr/libexec/qemu-kvm</emulator>
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<disk type='block' device='disk'>
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<source dev='/dev/HostVG/QEMUGuest1'/>
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<target dev='vdb' bus='virtio'/>
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<address type='pci' domain='0x0000' bus='0x07' slot='0x00' function='0x0'/>
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</disk>
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<controller type='virtio-serial' index='0'>
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<address type='pci' domain='0x0000' bus='0x04' slot='0x00' function='0x0'/>
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</controller>
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<controller type='scsi' index='0' model='virtio-scsi'>
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<address type='pci' domain='0x0000' bus='0x05' slot='0x00' function='0x0'/>
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</controller>
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<controller type='usb' index='0' model='nec-xhci'>
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<address type='pci' domain='0x0000' bus='0x06' slot='0x00' function='0x0'/>
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</controller>
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<controller type='sata' index='0'>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x1f' function='0x2'/>
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</controller>
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<controller type='pci' index='0' model='pcie-root'/>
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<controller type='pci' index='1' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='1' port='0x10'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x02' function='0x0'/>
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</controller>
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<controller type='pci' index='2' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='2' port='0x18'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x03' function='0x0'/>
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</controller>
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<controller type='pci' index='3' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='3' port='0x20'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x04' function='0x0'/>
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</controller>
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<controller type='pci' index='4' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='4' port='0x28'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x05' function='0x0'/>
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</controller>
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<controller type='pci' index='5' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='5' port='0x30'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x06' function='0x0'/>
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</controller>
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<controller type='pci' index='6' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='6' port='0x38'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x07' function='0x0'/>
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</controller>
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<controller type='pci' index='7' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='7' port='0x40'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x08' function='0x0'/>
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</controller>
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<controller type='pci' index='8' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='8' port='0x48'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x09' function='0x0'/>
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</controller>
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<controller type='pci' index='9' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='9' port='0x50'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x0a' function='0x0'/>
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</controller>
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<controller type='pci' index='10' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='10' port='0x58'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x0b' function='0x0'/>
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</controller>
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<controller type='pci' index='11' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='11' port='0x60'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x0c' function='0x0'/>
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</controller>
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<controller type='pci' index='12' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='12' port='0x68'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x0d' function='0x0'/>
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</controller>
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<controller type='pci' index='13' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='13' port='0x70'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x0e' function='0x0'/>
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</controller>
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<controller type='pci' index='14' model='pcie-root-port'>
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<model name='ioh3420'/>
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<target chassis='14' port='0x78'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x0f' function='0x0'/>
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</controller>
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<filesystem type='mount' accessmode='passthrough'>
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<source dir='/export/to/guest'/>
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<target dir='/import/from/host'/>
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<address type='pci' domain='0x0000' bus='0x01' slot='0x00' function='0x0'/>
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</filesystem>
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<interface type='user'>
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<mac address='00:11:22:33:44:55'/>
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<model type='virtio'/>
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<address type='pci' domain='0x0000' bus='0x02' slot='0x00' function='0x0'/>
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</interface>
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<interface type='user'>
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<mac address='00:11:22:33:44:66'/>
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<model type='e1000e'/>
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<address type='pci' domain='0x0000' bus='0x03' slot='0x00' function='0x0'/>
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</interface>
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<input type='passthrough' bus='virtio'>
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<source evdev='/dev/input/event1234'/>
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<address type='pci' domain='0x0000' bus='0x0a' slot='0x00' function='0x0'/>
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</input>
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<input type='mouse' bus='virtio'>
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<address type='pci' domain='0x0000' bus='0x0b' slot='0x00' function='0x0'/>
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</input>
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<input type='keyboard' bus='virtio'>
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<address type='pci' domain='0x0000' bus='0x0c' slot='0x00' function='0x0'/>
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</input>
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<input type='tablet' bus='virtio'>
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<address type='pci' domain='0x0000' bus='0x0d' slot='0x00' function='0x0'/>
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</input>
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<input type='mouse' bus='ps2'/>
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<input type='keyboard' bus='ps2'/>
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<video>
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<model type='virtio' heads='1' primary='yes'/>
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<address type='pci' domain='0x0000' bus='0x00' slot='0x01' function='0x0'/>
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</video>
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<memballoon model='virtio'>
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<address type='pci' domain='0x0000' bus='0x08' slot='0x00' function='0x0'/>
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</memballoon>
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<rng model='virtio'>
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<rate bytes='123' period='1234'/>
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<backend model='random'>/dev/urandom</backend>
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<address type='pci' domain='0x0000' bus='0x09' slot='0x00' function='0x0'/>
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</rng>
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</devices>
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</domain>
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