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6af8417415
This patch is introducing cache monitor(CMT) to cache and
memory bandwidth monitor(MBM) for monitoring CPU memory
bandwidth.
The host capability of the two monitors is also introduced
in this patch.
For CMT, the host capability is shown like:
<host>
...
<cache>
<bank id='0' level='3' type='both' size='15' unit='MiB' cpus='0-5'>
<control granularity='768' min='1536' unit='KiB' type='both' maxAllocs='4'/>
</bank>
<monitor level='3' 'reuseThreshold'='270336' maxMonitors='176'>
<feature name='llc_occupancy'/>
</monitor>
</cache>
...
</host>
For MBM, the capability is shown like this:
<host>
...
<memory_bandwidth>
<node id='1' cpus='6-11'>
<control granularity='10' min ='10' maxAllocs='4'/>
</node>
<monitor maxMonitors='176'>
<feature name='mbm_total_bytes'/>
<feature name='mbm_local_bytes'/>
</monitor>
</memory_bandwidth>
...
</host>
Signed-off-by: Wang Huaqiang <huaqiang.wang@intel.com>
Reviewed-by: John Ferlan <jferlan@redhat.com>
70 lines
2.5 KiB
XML
70 lines
2.5 KiB
XML
<capabilities>
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<host>
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<cpu>
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<arch>x86_64</arch>
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</cpu>
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<power_management/>
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<iommu support='no'/>
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<migration_features>
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<live/>
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</migration_features>
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<topology>
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<cells num='2'>
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<cell id='0'>
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<memory unit='KiB'>1048576</memory>
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<pages unit='KiB' size='4'>2048</pages>
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<pages unit='KiB' size='2048'>4096</pages>
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<pages unit='KiB' size='1048576'>6144</pages>
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<cpus num='6'>
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<cpu id='0' socket_id='0' core_id='0' siblings='0'/>
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<cpu id='1' socket_id='0' core_id='1' siblings='1'/>
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<cpu id='2' socket_id='0' core_id='2' siblings='2'/>
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<cpu id='3' socket_id='0' core_id='3' siblings='3'/>
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<cpu id='4' socket_id='0' core_id='4' siblings='4'/>
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<cpu id='5' socket_id='0' core_id='5' siblings='5'/>
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</cpus>
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</cell>
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<cell id='1'>
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<memory unit='KiB'>2097152</memory>
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<pages unit='KiB' size='4'>4096</pages>
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<pages unit='KiB' size='2048'>6144</pages>
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<pages unit='KiB' size='1048576'>8192</pages>
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<cpus num='6'>
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<cpu id='6' socket_id='1' core_id='0' siblings='6'/>
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<cpu id='7' socket_id='1' core_id='1' siblings='7'/>
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<cpu id='8' socket_id='1' core_id='2' siblings='8'/>
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<cpu id='9' socket_id='1' core_id='3' siblings='9'/>
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<cpu id='10' socket_id='1' core_id='4' siblings='10'/>
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<cpu id='11' socket_id='1' core_id='5' siblings='11'/>
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</cpus>
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</cell>
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</cells>
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</topology>
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<cache>
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<bank id='0' level='3' type='both' size='15' unit='MiB' cpus='0-5'>
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<control granularity='768' min='1536' unit='KiB' type='both' maxAllocs='4'/>
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</bank>
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<bank id='1' level='3' type='both' size='15' unit='MiB' cpus='6-11'>
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<control granularity='768' min='1536' unit='KiB' type='both' maxAllocs='4'/>
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</bank>
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<monitor level='3' reuseThreshold='270336' maxMonitors='176'>
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<feature name='llc_occupancy'/>
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</monitor>
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</cache>
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<memory_bandwidth>
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<node id='0' cpus='0-5'>
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<control granularity='10' min ='10' maxAllocs='4'/>
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</node>
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<node id='1' cpus='6-11'>
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<control granularity='10' min ='10' maxAllocs='4'/>
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</node>
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<monitor maxMonitors='176'>
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<feature name='mbm_total_bytes'/>
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<feature name='mbm_local_bytes'/>
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</monitor>
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</memory_bandwidth>
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</host>
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</capabilities>
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